A 1.8V 11μW CMOS smart humidity sensor for RFID sensing applications. - Zhichao Tan; Roel Daamen; Aurelie Humbert; Kamran Souri; Youngcheol Chae; Youri V. Ponomarev; Michiel A. P. Pertijs (A-SSCC, 2011)

An energy-efficient 15-bit capacitive sensor interface. - Zhichao Tan; Michiel A. P. Pertijs; Gerard C. M. Meijer (ESSCIRC, 2011)

Treating Non-infectious Fever after Orthopedic Surgery by nourishing yin: An inspiration from systematized identification of warm diseases. - Zhichao Tan; Da Guo; Lufeng Huang; Xuewei Cao; Jun Liu (BIBM Workshops, 2012)

A 1.2V 8.3nJ energy-efficient CMOS humidity sensor for RFID applications. - Zhichao Tan; Youngcheol Chae; Roel Daamen; Aurelie Humbert; Youri V. Ponomarev; Michiel A. P. Pertijs (VLSIC, 2012)

An Energy-Efficient 15-Bit Capacitive-Sensor Interface Based on Period Modulation. - Zhichao Tan; Saleh Heidary Shalmany; Gerard C. M. Meijer; Michiel A. P. Pertijs (IEEE J. Solid State Circuits, 2012)

A 1V 14b self-timed zero-crossing-based incremental ΔΣ ADC. - Chao Chen 019; Zhichao Tan; Michiel A. P. Pertijs (ISSCC, 2013)

A 1.2-V 8.3-nJ CMOS Humidity Sensor for RFID Applications. - Zhichao Tan; Roel Daamen; Aurelie Humbert; Youri Ponomarev; Youngcheol Chae; Michiel A. P. Pertijs (IEEE J. Solid State Circuits, 2013)

A fully isolated delta-sigma ADC for shunt based current sensing. - Zhichao Tan; Mick Mueck; Xiao Hong Du; Larry Getzin; Michael Guidry; Flow Zhao; Baoxing Chen (A-SSCC, 2015)

A Fully Isolated Delta-Sigma ADC for Shunt Based Current Sensing. - Zhichao Tan; Mick Mueck; Xiao Hong Du; Larry Getzin; Michael Guidry; Shane Keating; Xing Xing; Flow Zhao; Baoxing Chen (IEEE J. Solid State Circuits, 2016)

A dual-axis MEMS vibratory gyroscope ASIC with 0.0061°/s/VHz noise floor over 480 Hz bandwidth. - Zhichao Tan; Khiem Nguyen; Jeff Yan; Howard Samuels; Shane Keating; Paul Crocker; Bill Clark (A-SSCC, 2017)

Subtractive dithering technique for delta-sigma modulator. - Zhichao Tan; Roberto Maurino; Robert Adams 001; Khiem Nguyen (ISCAS, 2017)

Building Extraction Based on an Optimized Stacked Sparse Autoencoder of Structure and Training Samples Using LIDAR DSM and Optical Images. - Yiming Yan; Zhichao Tan; Nan Su 001; Chunhui Zhao 003 (Sensors, 2017)

Advances in Capacitive, Eddy Current, and Magnetic Displacement Sensors and Corresponding Interfaces. - Boby George; Zhichao Tan; Stoyan N. Nihtianov (IEEE Trans. Ind. Electron., 2017)

New Trends in Smart Sensors for Industrial Applications - Part I. - Stoyan N. Nihtianov; Zhichao Tan; Boby George (IEEE Trans. Ind. Electron., 2017)

New Trends in Smart Sensors for Industrial Applications - Part II. - Stoyan N. Nihtianov; Zhichao Tan; Boby George (IEEE Trans. Ind. Electron., 2017)

An Eddy Current-Capacitive Crack Detection Probe with High Insensitivity to Lift-Off. - S. Sreevatsan; Boby George; Zhichao Tan (IECON, 2018)

Sea-Ice Image Classification for Channel Navigation in Polar Application. - Nan Su 001; Chunming Zhang; Yiming Yan; Chunhui Zhao 003; Zhichao Tan (IGARSS, 2018)

Sea-Ice Scene Classification Using Aerial Images in Arctic Based on Transfer Learning. - Yiming Yan; Zhichao Tan; Nan Su 001 (IGARSS, 2018)

An Adaptive SAR ADC for DC to Nyquist Rate Signals. - Baozhen Chen; Frank M. Yaul; Zhichao Tan; Lalinda Fernando (ISCAS, 2018)

A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter. - Xiyuan Tang; Shaolan Li; Linxiao Shen; Wenda Zhao; Xiangxing Yang; Randy Williams; Jiaxin Liu; Zhichao Tan; Neal A. Hall; Nan Sun 001 (ISSCC, 2019)

A Data Augmentation Strategy Based on Simulated Samples for Ship Detection in RGB Remote Sensing Images. - Yiming Yan; Zhichao Tan; Nan Su 001 (ISPRS Int. J. Geo Inf., 2019)

Correction: Yan, Y.; et al. Building Extraction Based on an Optimized Stacked Sparse Autoencoder of Structure and Training Samples Using LIDAR DSM and Optical Images. Sensors 2017, 17, 1957. - Yiming Yan; Zhichao Tan; Nan Su 001; Chunhui Zhao 003 (Sensors, 2019)

A 1-V 560-nW SAR ADC With 90-dB SNDR for IoT Sensing Applications. - Huajun Zhang 001; Zhichao Tan; Chao Chu; Baozhen Chen; Hongxing Li; Michael C. W. Coln; Khiem Nguyen (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A 6 $ mu$ W 95 dB SNDR Inverter Based $ Sigma Delta$ Modulator With Subtractive Dithering and SAR Quantizer. - Huajun Zhang 001; Zhichao Tan; Yi Zhang; Baozhen Chen; Roberto Maurino; Robert Adams 001; Khiem Nguyen (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter. - Xiyuan Tang; Shaolan Li; Xiangxing Yang; Linxiao Shen; Wenda Zhao; Randall P. Williams; Jiaxin Liu; Zhichao Tan; Neal A. Hall; David Z. Pan; Nan Sun 001 (IEEE J. Solid State Circuits, 2020)

Incremental Delta-Sigma ADCs: A Tutorial Review. - Zhichao Tan; Chia-Hung Chen; Youngcheol Chae; Gabor C. Temes (IEEE Trans. Circuits Syst., 2020)

A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers. - Yibo Zhao 003; Huajun Zhang 001; Yaopeng Hu; Yuanxin Bao; Le Ye; Wanyuan Qu; Menglian Zhao; Zhichao Tan (CICC, 2021)

5.1 A 1.5μW 0.135pJ·%RH2 CMOS Humidity Sensor Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array. - Heyi Li; Zhichao Tan; Yuanxin Bao; Han Xiao 006; Hao Zhang 119; Kaixuan Du; Yihan Zhang 002; Le Ye; Ru Huang 001 (ISSCC, 2021)

12.1 A 148nW General-Purpose Event-Driven Intelligent Wake-Up Chip for AIoT Devices Using Asynchronous Spike-Based Feature Extractor and Convolutional Neural Network. - Zhixuan Wang; Le Ye; Ying Liu 069; Peng Zhou; Zhichao Tan; Haitao Fan; Yihan Zhang 002; Jiayoon Ru; Yangyuan Wang; Ru Huang 001 (ISSCC, 2021)

33.4 An 8A 998A/inch3 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion. - Xu Yang; Haixiao Cao; Chenkang Xue; Lenian He; Zhichao Tan; Menglian Zhao; Yong Ding 003; Wuhua Li; Wanyuan Qu (ISSCC, 2021)

A 12-Level Series-Capacitor 48-1V DC-DC Converter With On-Chip Switch and GaN Hybrid Power Conversion. - Haixiao Cao; Xu Yang; Chenkang Xue; Lenian He; Zhichao Tan; Menglian Zhao; Yong Ding 003; Wuhua Li; Wanyuan Qu (IEEE J. Solid State Circuits, 2021)

Energy-Efficient CMOS Humidity Sensors Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array. - Heyi Li; Zhichao Tan; Yuanxin Bao; Han Xiao 006; Hao Zhang 119; Kaixuan Du; Linxiao Shen; Jiayoon Ru; Yihan Zhang 002; Le Ye; Ru Huang 001 (IEEE J. Solid State Circuits, 2021)

A 148-nW Reconfigurable Event-Driven Intelligent Wake-Up System for AIoT Nodes Using an Asynchronous Pulse-Based Feature Extractor and a Convolutional Neural Network. - Zhixuan Wang; Ying Liu 069; Peng Zhou; Zhichao Tan; Haitao Fan; Yihan Zhang 002; Linxiao Shen; Jiayoon Ru; Yangyuan Wang; Le Ye; Ru Huang 001 (IEEE J. Solid State Circuits, 2021)

A Software-Defined Always-On System With 57-75-nW Wake-Up Function Using Asynchronous Clock-Free Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADC. - Zhixuan Wang; Hao Zhang 119; Yihan Zhang 002; Linxiao Shen; Jiayoon Ru; Haitao Fan; Zhichao Tan; Yangyuan Wang; Le Ye; Ru Huang 001 (IEEE J. Solid State Circuits, 2021)

Ultra-Low-Power and Performance-Improved Logic Circuit Using Hybrid TFET-MOSFET Standard Cells Topologies and Optimized Digital Front-End Process. - Zhixuan Wang; Le Ye; Qianqian Huang; Kaixuan Du; Zhichao Tan; Yangyuan Wang; Ru Huang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems. - Le Ye; Zhixuan Wang; Ying Liu 069; Peiyu Chen; Heyi Li; Hao Zhang 119; Meng Wu 005; Wei He; Linxiao Shen; Yihan Zhang 002; Zhichao Tan; Yangyuan Wang; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An Energy-Efficient Readout Circuit Based on Incremental Delta-Sigma ADC with Decimation Filter for CMOS Image Sensors. - Junsheng Chen; Lingxin Meng; Menglian Zhao; Zhichao Tan (APCCAS, 2022)

A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme. - Hao Zhang 119; Linxiao Shen; Shichuang Zhang; Heyi Li; Yihan Zhang 002; Zhichao Tan; Ru Huang 001; Le Ye (CICC, 2022)

A 10.12μW 101.98dB-SNDR Three-step Incremental Analog-to-Digital Converter. - Huaikun Ji; Zhenhao Fan; Zhaonan Lu; Zhichao Tan; Menglian Zhao (ISOCC, 2022)

A 2.87μW 1kHz-BW 94.0dB-SNDR 2-0 MASH ADC Using FIA with Dynamic-Body-Biasing Assisted CLS Technique. - Yaopeng Hu; Yibo Zhao 003; Wanyuan Qu; Le Ye; Menglian Zhao; Zhichao Tan (ISSCC, 2022)

A 4.96µW 15b Self-Timed Dynamic-Amplifier-Based Incremental Zoom ADC. - Yu-Yan Liu; Menglian Zhao; Yibo Zhao 003; Xiaopeng Yu 002; Nianxiong Nick Tan; Le Ye; Zhichao Tan (ISSCC, 2022)

A 5V Input 98.4% Peak Efficiency Reconfigurable Capacitive-Sigma Converter With Greater than 90% Peak Efficiency for the Entire 0.4 1.2V Output Range. - Xu Yang; Linhu Zhao; Menglian Zhao; Zhichao Tan; Lenian He; Yong Ding 003; Wuhua Li; Wanyuan Qu (ISSCC, 2022)

A 4-μW Bandwidth/Power Scalable Delta-Sigma Modulator Based on Swing-Enhanced Floating Inverter Amplifiers. - Menglian Zhao; Yibo Zhao 003; Huajun Zhang 001; Yaopeng Hu; Yuanxin Bao; Le Ye; Wanyuan Qu; Zhichao Tan (IEEE J. Solid State Circuits, 2022)

An Ultra-Low Quiescent Current Tri-Mode DC-DC Buck Converter With 92.1% Peak Efficiency for IoT Applications. - Menglian Zhao; Mengyu Li; Shuang Song 003; Yaopeng Hu; Yanxia Yao; Xuetong Bai; Rubo Hu; Xiaobo Wu; Zhichao Tan (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 1.2 V 2.3 µW 94.7 dB DR Delta-Sigma Modulator With Dynamic-Range Enhancement and Tri-Level CDAC. - Cong Wei 002; Rongshan Wei; Lijie Huang; Gongxing Huang; Jinze Lai; Zhichao Tan (A-SSCC, 2023)

A 1.8V 16μA 136.5dB DR PPG/NIRS Recording IC using Noise Shaping Triple Slope Light to Digital Converter. - Mengyu Li; Shuang Song 003; Dehong Wang; Feijun Zheng; Tian Yang; Yalong Wan; Kai Huang 002; Zhichao Tan; Menglian Zhao (CICC, 2023)

A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal Acquisition. - Mengyu Li; Shuang Song 003; Wanyuan Qu; Le Ye; Menglian Zhao; Zhichao Tan (ESSCIRC, 2023)

An 18.2μW 101.1dB DR Fully-Dynamic ΔΣ ADC with Partially-Feedback Noise-Shaping Quantizer and CLS-Embedded Two-Stage FIAs. - Lingxin Meng; Junsheng Chen; Menglian Zhao; Zhichao Tan (ESSCIRC, 2023)

A 94.6dB-SNDR 50kHz-BW 1-1-1 MASH ADC Using OTA-FIA Based Integrators. - Xirui Hao; Junsheng Chen; Lingxin Meng; Menglian Zhao; Zhichao Tan (ISCAS, 2023)

A 1V 56.07dB SNDR 10MHz Bandwidth Digital Slope ADC Based on Preset Bidirectional-Shifting Technique. - Yunhui Zhang; Shuang Song 003; Menglian Zhao; Zhichao Tan (ISCAS, 2023)

A 5A 94.5% Peak Efficiency 9 16V-to-1V Dual-Path Series-Capacitor Converter with Full Duty Range and Low V.A Metric. - Xu Yang; Linhu Zhao; Menglian Zhao; Zhichao Tan; Yong Ding 003; Wuhua Li; Wanyuan Qu (ISSCC, 2023)

A 4.96-μW 15-bit Self-Timed Dynamic-Amplifier-Based Incremental Zoom ADC. - Yuyan Liu; Menglian Zhao; Yibo Zhao 003; Xiaopeng Yu 002; Nianxiong Nick Tan; Le Ye; Zhichao Tan (IEEE J. Solid State Circuits, 2023)

A 1.2-V 2.87-μ W 94.0-dB SNDR Discrete-Time 2-0 MASH Delta-Sigma ADC. - Lingxin Meng; Yaopeng Hu; Yibo Zhao 003; Wanyuan Qu; Le Ye; Menglian Zhao; Zhichao Tan (IEEE J. Solid State Circuits, 2023)

Fully Dynamic Zoom-ADC Based on Improved Swing-Enhanced FIAs Using CLS Technique With 1250× Bandwidth/Power Scalability. - Yibo Zhao 003; Menglian Zhao; Zhichao Tan (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 1 V 1.07 μW 15-Bit Pseudo-Pseudo-Differential Incremental Zoom ADC. - Zhaonan Lu; Huaikun Ji; Wanyuan Qu; Le Ye; Menglian Zhao; Zhichao Tan (IEEE J. Solid State Circuits, 2023)

Power transformer fault diagnosis based on a self-strengthening offline pre-training model. - Mingwei Zhong; Siqi Yi; Jingmin Fan; Yikang Zhang; Guanglin He; Yunfei Cao; Lutao Feng; Zhichao Tan; Wenjun Mo (Eng. Appl. Artif. Intell., 2023)

A 5.76GS/s 180MHz-BW 74.1dB-DR 2x TI Extrapolated CT DSM with Broadband Hybrid-Inputs Current-Mode Adder in 28nm CMOS. - Yuekai Liu; Meng Guo; Yichen Jin; Yan Liu 016; Mingqiang Guo; Sai-Weng Sin; Zhichao Tan; Liang Qi 002 (A-SSCC, 2024)

A 96dB DR 3.1GΩ Input Impedance CT-DT ΔΣ Readout Frontend with Level-Crossing Input Range Enhancement for Neural Recordings. - Tian Yang; Mengyu Li; Shuang Song 003; Yiqi Chen; Zhaonan Lu; Shiwei Wang 001; Yongpeng Cheng; Zhichao Tan; Menglian Zhao (BioCAS, 2024)

A 188.6-μW Continuous-time Incremental Delta-Sigma ADC with Extended Counting achieving 95.2-dB SNDR and 175.4-dB FoMSNDR. - Zhaonan Lu; Menglian Zhao; Zhichao Tan (CICC, 2024)

A 93.6dB-SNDR 5kHz-BW Fully Dynamic Hybrid CT-DT Noise Shaping SAR ADC. - Lingxin Meng; Menglian Zhao; Zhichao Tan (CICC, 2024)

An 871nW 96.2dB-SNDR Pipelined NS SAR ADC Achieving 180.8dB-FoMSNDR with a Charge-Efficient CLS-Assisted Two-Stage FIA. - Shan Zhang; Lingxin Meng; Zhaonan Lu; Wanyuan Qu; Shuang Song 003; Menglian Zhao; Zhichao Tan (CICC, 2024)

A 91.7dB-SNDR 5kHz BW 18.5μW PPD-based Single-OTA Zoom ADC using CLS-enhanced Inverter Amplifier. - Yining Zhao; Zhaonan Lu; Shuang Song 003; Liang Zhao; Menglian Zhao; Zhichao Tan (ICTA, 2024)

A 0.5V 723nW 84.3dB-SNDR Dynamic Zoom ADC with CLS-Assisted Capacitively-Biased FIA. - Weiqiang Chen; Lingxin Meng; Yining Zhao; Menglian Zhao; Zhichao Tan (ISCAS, 2024)

An SRAM Compute-In-Memory Macro Based on Direct Coupling SAR ADC and DAC Reuse. - Yongteng Ma; Xuliang Yu; Zhichao Tan; Liang Zhao (ISCAS, 2024)

A 12.9-ENOB 50.6 fJ/conv.step Time-Amplitude Aligned Level-Crossing SAR ADC. - Zexin Wang; Linxin Meng; Yi Huo; Menglian Zhao; Zhichao Tan (NewCAS, 2024)

A 20kHz 87.2dB SNDR 12.1µW NS SAR ADC Based on Quantization-Error-Matched RLSB-First Algorithm. - Yunhui Zhang; Zexin Wang; Menglian Zhao; Zhichao Tan (NewCAS, 2024)

Low-Power On-Chip Energy Harvesting: From Interface Circuits Perspective. - Shuang Song 003; Dehong Wang; Mengyu Li; Siyao Cao; Feijun Zheng; Kai Huang 002; Zhichao Tan; Sijun Du; Menglian Zhao (IEEE Open J. Circuits Syst., 2024)

A 20.3μW 1.9GΩ Input Impedance Capacitively-Coupled Chopper-Stabilized Amplifier for Bio-Potential Readout. - Yizhao Zhou; Shuang Song 003; Yu Zheng; Tian Yang; Mengyu Li; Yipeng Cao; Feijun Zheng; Kai Huang 002; Zhichao Tan; Menglian Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A High-Efficiency Wide Output Range Reconfigurable Capacitive-Sigma DC-DC Converter. - Xu Yang; Linhu Zhao; Zhichao Tan; Menglian Zhao; Yong Ding 003; Wuhua Li; Yan Lu 002; Wanyuan Qu (IEEE J. Solid State Circuits, 2024)

A 30-μW 94.7-dB SNDR Noise-Shaping Current-Mode Direct-to-Digital Converter Using Triple-Slope Quantizer for PPG/NIRS Readout. - Mengyu Li; Shuang Song 003; Dehong Wang; Tian Yang; Yu Zheng; Qiuyang Lin; Feijun Zheng; Kai Huang 002; Zhichao Tan; Menglian Zhao (IEEE J. Solid State Circuits, 2024)

A Partially Feedback NSSAR Embedded Third-Order Delta-Sigma Modulator With Gain-Boosted Two-Stage FIAs. - Lingxin Meng; Junsheng Chen; Menglian Zhao; Zhichao Tan (IEEE J. Solid State Circuits, 2024)

An Energy-Efficient Discrete-Time Delta-Sigma Modulator With Dynamic-Range Enhancement and Tri-Level CDAC. - Cong Wei 002; Rongshan Wei; Lijie Huang; Gongxing Huang; Jinze Lai; Zhichao Tan (IEEE J. Solid State Circuits, 2024)

A 1V 9-86 fJ/Conv.Step 72.5dB-SNDR Level-Crossing Pipelined ADC with Triggered Sampling and Level Feedback. - Zexin Wang; Lingxin Meng; Menglian Zhao; Mengyu Li; Shuang Song 003; Zhichao Tan (CICC, 2025)

A 94.1dB-DR 40kHz-BW Continuous-Time Delta-Sigma Modulator with Current-reused Amplifiers. - Zhaonan Lu; Menglian Zhao; Zhichao Tan (ISCAS, 2025)

SQNR Improvement of Incremental Zoom ADCs with Raised-Order CoI Filter and Dither Injection. - Lingxin Meng; Menglian Zhao; Zhichao Tan (ISCAS, 2025)

An Event-Driven Load Regulation Enhanced LDO IC with 9.2fs-Transient-FoM and 1.6µA-Quiescent Current for Low Voltage IoT Applications. - Dehong Wang; Siyao Cao; Mengyu Li; Shiwei Wang 001; Xiaopeng Yu 002; Zhichao Tan; Menglian Zhao; Shuang Song 003 (ISCAS, 2025)

A 12A 89.3% Peak Efficiency and 26mV Undershoot 12-to-1V Two-Stage Converter with Regulated Resonant Switched-Capacitor Regulators. - Shengdao Ren; Yukan Du; Menglian Zhao; Zhichao Tan; Chushan Li; Yong Ding 003; Wuhua Li; Wanyuan Qu (ISSCC, 2025)

A 0.6-V 2.55-μW 92.3-dB SNDR VCM-Free Delta-Sigma Modulator with 2×Input-Range Using Boosted-Supply Floating Inverter Amplifier. - Weiqiang Chen; Menglian Zhao; Zhichao Tan (NewCAS, 2025)

A 0.7 V 4.2 μW 13 bit self-timed incremental NC-SMASH ADC with SAR-logic-based integrator. - Junqi Liu; Menglian Zhao; Zhaonan Lu; Lingxin Meng; Zhichao Tan (IEICE Electron. Express, 2025)

A 62.2dB SNDR Event-Driven Level-Crossing ADC With SAR-Assisted Delay Compensation Loop for Time-Sparse Biomedical Signal Acquisition. - Mengyu Li; Yi Huo; Shuang Song 003; Wanyuan Qu; Le Ye; Menglian Zhao; Zhichao Tan (IEEE Trans. Biomed. Circuits Syst., 2025)

An 871 nW 96.2 dB SNDR Pipelined Second-Order Noise-Shaping SAR ADC Employing Charge-Efficient CLS-Assisted Residue Amplifier. - Shan Zhang; Lingxin Meng; Zhaonan Lu; Shuang Song 003; Wanyuan Qu; Menglian Zhao; Zhichao Tan (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A High-Efficiency 12/1-V Dual-Path Series-Capacitor Converter With Low V⋅A Metric and Full Duty Range. - Xu Yang; Linhu Zhao; Zhichao Tan; Menglian Zhao; Yong Ding 003; Wuhua Li; Wanyuan Qu (IEEE J. Solid State Circuits, 2025)

A 93.6-dB SNDR Fully Dynamic CT-DT Noise-Shaping SAR ADC With Closed-Loop Capacitively Coupled Two-Stage FIA. - Lingxin Meng; Shuang Song 003; Menglian Zhao; Zhichao Tan (IEEE J. Solid State Circuits, 2025)