An Improved Reconfiguration Algorithm for VLSI Arrays with A-Star. - Junyan Qian; Zhide Zhou; Lingzhong Zhao; Tianlong Gu (ICCSA (2), 2016)

Satisfiability-based method for reconfiguring power efficient VLSI array. - Junyan Qian; Wei Cao; Jia Hu; Jingwei Zhang 003; Zhoubo Xu; Zhide Zhou (IEICE Electron. Express, 2016)

An integer programming method for constructing tightly coupled VLSI subarrays. - Junyan Qian; Zhide Zhou; Lingzhong Zhao; Tianlong Gu; Liang Chang 003 (IEICE Electron. Express, 2016)

Optimal Reconfiguration of High-Performance VLSI Subarrays with Network Flow. - Junyan Qian; Zhide Zhou; Tianlong Gu; Lingzhong Zhao; Liang Chang 003 (IEEE Trans. Parallel Distributed Syst., 2016)

A Mathematical Model for Reconfiguring VLSI Subarrays Under Row and Column Rerouting. - Junyan Qian; Yiping Wang; Liang Chang 003; Zhide Zhou; Lingzhong Zhao (IEEE Access, 2017)

AdaBoost-based Refused Bequest Code Smell Detection with Synthetic Instances. - Hao Chen; Zhilei Ren; Lei Qiao 002; Zhide Zhou; Guojun Gao; Yue Ma; He Jiang 001 (DSA, 2020)

An efficient multiple shortest augmenting paths algorithm for constructing high performance VLSI subarray. - Junyan Qian; Bisheng Huang; Hao Ding 007; Zhide Zhou; Lingzhong Zhao; Zhongyi Zhai (Integr., 2020)

Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays. - Junyan Qian; Hao Ding 007; Hanpeng Xiao; Zhide Zhou; Lingzhong Zhao; Zhongyi Zhai (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Multi-objective Evolutionary Algorithm for String SMT Solver Testing. - Zhilei Ren; Xiaofei Fan; Xiaochen Li; Zhide Zhou; He Jiang 001 (DSA, 2021)

An improved algorithm for accelerating reconfiguration of VLSI array. - Junyan Qian; Fuhao Mo; Hao Ding 007; Zhide Zhou; Lingzhong Zhao; Zhongyi Zhai (Integr., 2021)

An empirical study of optimization bugs in GCC and LLVM. - Zhide Zhou; Zhilei Ren; Guojun Gao; He Jiang 001 (J. Syst. Softw., 2021)

Automated Patching for Unreproducible Builds. - Zhilei Ren; Shiwei Sun; Jifeng Xuan; Xiaochen Li; Zhide Zhou; He Jiang 001 (ICSE, 2022)

Remgen: Remanufacturing a Random Program Generator for Compiler Testing. - Haoxin Tu; He Jiang 001; Xiaochen Li; Zhilei Ren; Zhide Zhou; Lingxiao Jiang (ISSRE, 2022)

Detecting Simulink compiler bugs via controllable zombie blocks mutation. - Shikai Guo; He Jiang 001; Zhihao Xu; Xiaochen Li; Zhilei Ren; Zhide Zhou; Rong Chen 003 (ESEC/SIGSOFT FSE, 2022)

Detecting Compiler Bugs Via a Deep Learning-Based Framework. - Yixuan Tang; Zhilei Ren; He Jiang 001; Lei Qiao 002; Dong Liu 025; Zhide Zhou; Weiqiang Kong (Int. J. Softw. Eng. Knowl. Eng., 2022)

SMARTEST: A Surrogate-Assisted Memetic Algorithm for Code Size Reduction. - He Jiang 001; Guojun Gao; Zhilei Ren; Xin Chen 032; Zhide Zhou (IEEE Trans. Reliab., 2022)

LocSeq: Automated Localization for Compiler Optimization Sequence Bugs of LLVM. - Zhide Zhou; He Jiang 001; Zhilei Ren; Yuting Chen 001; Lei Qiao 002 (IEEE Trans. Reliab., 2022)

CTOS: Compiler Testing for Optimization Sequences of LLVM. - He Jiang 001; Zhide Zhou; Zhilei Ren; Jingxuan Zhang; Xiaochen Li (IEEE Trans. Software Eng., 2022)

Detecting Compiler Warning Defects Via Diversity-Guided Program Mutation. - Yixuan Tang; He Jiang 001; Zhide Zhou; Xiaochen Li; Zhilei Ren; Weiqiang Kong (IEEE Trans. Software Eng., 2022)

Detecting JavaScript Transpiler Bugs with Grammar-guided Mutation. - Le Chen; Zhide Zhou; Xiaochen Li; He Jiang 001 (SANER, 2023)

A Comprehensive Study of WebAssembly Runtime Bugs. - Yue Wang; Zhide Zhou; Zhilei Ren; Dong Liu 025; He Jiang 001 (SANER, 2023)

LLM4CBI: Taming LLMs to Generate Effective Test Programs for Compiler Bug Isolation. - Haoxin Tu; Zhide Zhou; He Jiang 001; Imam Nur Bani Yusuf; Yuxian Li; Lingxiao Jiang (CoRR, 2023)

Detecting C++ Compiler Front-End Bugs via Grammar Mutation and Differential Testing. - Haoxin Tu; He Jiang 001; Zhide Zhou; Yixuan Tang; Zhilei Ren; Lei Qiao 002; Lingxiao Jiang (IEEE Trans. Reliab., 2023)

Latency-Based Inter-Operator Scheduling for CNN Inference Acceleration on GPU. - Yukai Ping; He Jiang 001; Xingxiang Liu; Zhenyang Zhao; Zhide Zhou; Xin Chen 032 (IEEE Trans. Serv. Comput., 2024)

A Testing Program and Pragma Combination Selection Based Framework for High-Level Synthesis Tool Pragma-Related Bug Detection. - He Jiang 001; Zun Wang; Zhide Zhou; Xiaochen Li; Shikai Guo; Weifeng Sun; Tao Zhang 001 (IEEE Trans. Software Eng., 2024)

Isolating Compiler Bugs by Generating Effective Witness Programs With Large Language Models. - Haoxin Tu; Zhide Zhou; He Jiang 001; Imam Nur Bani Yusuf; Yuxian Li; Lingxiao Jiang (IEEE Trans. Software Eng., 2024)

HetFL: Heterogeneous Graph-Based Software Fault Localization. - Xin Chen 032; Tian Sun; Dongling Zhuang; Dongjin Yu; He Jiang 001; Zhide Zhou; Sicheng Li 010 (IEEE Trans. Software Eng., 2024)

Logic Synthesis Tools' Testing via Configuration Diversification With Combinatorial Multiarmed Bandit. - Peiyu Zou; He Jiang 001; Xiaochen Li; Zhide Zhou; Shikai Guo; Xu Zhao (IEEE Trans. Instrum. Meas., 2025)

Multidemand Forecasting for Electric Vehicle Charging Stations Under Time-of-Use Strategy via Attention-Based Deep Neural Network. - Zhide Zhou; He Jiang 001; Lei Yao; Shaolin Wang; Haoyang Che; Ying Gu (IEEE Internet Things J., 2025)