A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. - Yuchen Ren; Zhijian Liao; Xiaozhong Shi; Jinyu Xie; Yunhui Qiu; Hankun Lv; Wenbo Yin; Lingli Wang; Bowei Yu; Hua Chen; Xianjun He (FPL, 2019)

FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. - Yunhui Qiu; Jinyu Xie; Hankun Lv; Wenbo Yin; Wai-Shing Luk; Lingli Wang; Bowei Yu; Hua Chen; Xianjun Ge; Zhijian Liao; Xiaozhong Shi (IEEE Trans. Parallel Distributed Syst., 2020)

A novel identity-based multi-signature scheme over NTRU lattices. - Xinjian Chen 004; Qiong Huang 001; Hongbo Li 004; Zhijian Liao; Willy Susilo (Theor. Comput. Sci., 2022)

A fully dynamic forward-secure group signature from lattice. - Zhijian Liao; Qiong Huang 001; Xinjian Chen 004 (Cybersecur., 2022)