Predicate Analysis Based on Path Information. - Li Shen 007; Zhiying Wang 003; Jianzhuang Lu (APPT, 2003)

TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. - Lei Wang 011; Hongyi Lu; Kui Dai; Zhiying Wang 003 (Asia-Pacific Computer Systems Architecture Conference, 2004)

Improving Security Architecture Development Based on Multiple Criteria Decision Making. - Fang Liu 002; Kui Dai; Zhiying Wang 003 (AWCC, 2004)

Analysis of Inter-Frame Coding Without Intra Modes in H.264. - Yun Cheng; Zhiying Wang 003; Kui Dai; Jianjun Guo (Eurographics Multimedia Workshop, 2004)

A New Technique for Program Code Compression in Embedded Microprocessor. - Ming-che Lai; Kui Dai; Li Shen 007; Zhiying Wang 003 (ICESS, 2004)

Applying multiple criteria decision making to improve security architecture development. - Fang Liu 002; Kui Dai; Zhiying Wang 003 (InfoSecu, 2004)

Research on Fast Block Participation Mode Selection Algorithm in H.264. - Jianjun Guo; Kui Dai; Yun Cheng; Zhiying Wang 003 (ACIS-ICIS, 2005)

A Fast Motion Estimation Algorithm Based on Diamond and Simplified Square Search Patterns. - Yun Cheng; Kui Dai; Zhiying Wang 003; Jianjun Guo (CIARP, 2005)

Research on intra modes for inter-frame coding in H.264. - Yun Cheng; Zhiying Wang 003; Jianjun Guo; Kui Dai (CSCWD (2), 2005)

Retargetable Machine-Description System: Multi-layer Architecture Approach. - Dan Wu; Zhiying Wang 003; Kui Dai (GCC, 2005)

A Fast Motion Estimation Algorithm Based on Diamond and Triangle Search Patterns. - Yun Cheng; Zhiying Wang 003; Kui Dai; Jianjun Guo (IbPRIA (1), 2005)

Research on Fuzzy Group Decision Making in Security Risk Assessment. - Fang Liu 002; Kui Dai; Zhiying Wang 003; Jun Ma 015 (ICN (2), 2005)

Design of a Configurable Embedded Processor Architecture for DSP Functions. - Hong Yue; Ming-che Lai; Kui Dai; Zhiying Wang 003 (ICPADS (2), 2005)

Protecting Mass Data Basing on Small Trusted Agent. - Fangyong Hou; Zhiying Wang 003; Kui Dai; Yun Liu (ISPEC, 2005)

Trust-Enhanced Alteration Scenario for Universal Computer. - Jiangchun Ren; Kui Dai; Zhiying Wang 003 (PRDC, 2005)

Research on Risk Probability Estimating Using Fuzzy Clustering for Dynamic Security Assessment. - Fang Liu 002; Yong Chen; Kui Dai; Zhiying Wang 003; Zhiping Cai (RSFDGrC (2), 2005)

Design and Implementation a TPM Chip SUP320 by SOC. - Jiangchun Ren; Kui Dai; Zhiying Wang 003; Xue-mi Zhao; Yuan-man Tong (SEC, 2005)

Two New Space-Time Triple Modular Redundancy Techniques for Improving Fault Tolerance of Computer Systems. - Wei Chen 009; Rui Gong; Kui Dai; Fang Liu 002; Zhiying Wang 003 (CIT, 2006)

An Approximate Method for Performance Evaluation of Asynchronous Pipeline Rings. - Lei Wang 011; Zhiying Wang 003; Kui Dai (CIT, 2006)

A Heterogeneous Multi-core Processor Architecture for High Performance Computing. - Jianjun Guo; Kui Dai; Zhiying Wang 003 (Asia-Pacific Computer Systems Architecture Conference, 2006)

Cycle Period Analysis and Optimization of Timed Circuits. - Lei Wang 011; Zhiying Wang 003; Kui Dai (Asia-Pacific Computer Systems Architecture Conference, 2006)

A Dynamic Trust Model Based on Feedback Control Mechanism for P2P Applications. - Chenlin Huang; Huaping Hu; Zhiying Wang 003 (ATC, 2006)

Designing Power Analysis Resistant and High Performance Block Cipher Coprocessor Using WDDL and Wave-Pipelining. - Yuan-man Tong; Zhiying Wang 003; Kui Dai; Hongyi Lu (Inscrypt, 2006)

Improving the Fault Tolerance of a Computer System with Space-Time Triple Modular Redundancy. - Wei Chen 009; Rui Gong; Fang Liu 002; Kui Dai; Zhiying Wang 003 (ESA, 2006)

A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications. - Hong Yue; Kui Dai; Zhiying Wang 003 (ESA, 2006)

Modified Triple Modular Redundancy Structure based on Asynchronous Circuit Technique. - Rui Gong; Wei Chen 009; Fang Liu 002; Kui Dai; Zhiying Wang 003 (DFT, 2006)

A High Performance Heterogeneous Architecture and Its Optimization Design. - Jianjun Guo; Kui Dai; Zhiying Wang 003 (HPCC, 2006)

A Heterogeneous Embedded MPSoC for Multimedia Applications. - Hong Yue; Zhiying Wang 003; Kui Dai (HPCC, 2006)

A Novel Data-Parallel Coprocessor for Multimedia Signal Processing. - Ming-che Lai; Kui Dai; Lu Hong-yi; Zhiying Wang 003 (ICME, 2006)

Intrusion Alert Analysis Based on PCA and the LVQ Neural Network. - Jing-Xin Wang; Zhiying Wang 003; Kui Dai (ICONIP (3), 2006)

A PCA-LVQ Model for Intrusion Alert Analysis. - Jing-Xin Wang; Zhiying Wang 003; Kui Dai (ISI, 2006)

An Efficient Way to Build Secure Disk. - Fangyong Hou; Hongjun He; Zhiying Wang 003; Kui Dai (ISPEC, 2006)

A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. - Xue-mi Zhao; Zhiying Wang 003; Hongyi Lu; Kui Dai (VLSI-SoC, 2006)

Research and Implementation of a 32-Bit Asynchronous Multiplier. - Yong Li 006; Lei Wang 011; Rui Gong; Kui Dai; Zhiying Wang 003 (J. Comput. Res. Dev., 2006)

A Low-Power Application Specific Instruction Set Processor Using Asynchronous Function Units. - Yong Li 006; Zhiying Wang 003; Kui Dai (CIT, 2007)

Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. - Yong Li 006; Zhiying Wang 003; Xue-mi Zhao; Jian Ruan; Kui Dai (Asia-Pacific Computer Systems Architecture Conference, 2007)

An Optimal Design Method for De-synchronous Circuit Based on Control Graph. - Gang Jin; Lei Wang 011; Zhiying Wang 003; Kui Dai (APPT, 2007)

A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. - Libo Huang; Li Shen 007; Kui Dai; Zhiying Wang 003 (IEEE Symposium on Computer Arithmetic, 2007)

A Low-Power Globally Synchronous Locally Asynchronous FFT Processor. - Yong Li 006; Zhiying Wang 003; Jian Ruan; Kui Dai (HPCC, 2007)

An Interest-Based Intelligent Link Selection Algorithm in Unstructured P2P Environment. - Hao Ren; Nong Xiao 001; Zhiying Wang 003 (ICA3PP, 2007)

Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. - Jian Ruan; Zhiying Wang 003; Kui Dai; Yong Li 006 (International Conference on Computational Science (4), 2007)

A Distributed Cut Set Discovery Algorithm in P2P Environment. - Hao Ren; Nong Xiao 001; Zhiying Wang 003 (ICPP Workshops, 2007)

Security Event Management System based on Mobile Agent Technology. - Wang Jingxin; Zhiying Wang 003; Kui Dai (ISI, 2007)

Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors. - Miao Wang; Guiming Wu; Zhiying Wang 003 (ISPA, 2007)

The Research of an Embedded Processor Element for Multimedia Domain. - Ming-che Lai; Jianjun Guo; Lv Yasuai; Kui Dai; Zhiying Wang 003 (MCAM, 2007)

Template Vertical Dictionary-Based Program Compression Scheme on the TTA. - Ming-che Lai; Zhiying Wang 003; Jianjun Guo; Kui Dai; Shen Li (PATMOS, 2007)

Design and Test of Self-checking Asynchronous Control Circuit. - Jian Ruan; Zhiying Wang 003; Kui Dai; Yong Li 006 (PATMOS, 2007)

Memory System Design for a Multi-core Processor. - Jianjun Guo; Ming-che Lai; Zhengyuan Pang; Libo Huang; Fangyuan Chen; Kui Dai; Zhiying Wang 003 (CISIS, 2008)

Escaping from Blocking: A Dynamic Virtual Channel for Pipelined Routers. - Ming-che Lai; Lei Gao; Wei Shi; Zhiying Wang 003 (CISIS, 2008)

A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers. - Ming-che Lai; Zhiying Wang 003; Lei Gao; Hongyi Lu; Kui Dai (DAC, 2008)

Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques. - Ya-Shuai Lü; Li Shen 007; Libo Huang; Zhiying Wang 003; Nong Xiao 001 (DAC, 2008)

A Framework to Evaluate the Trade-off among AVF Performance and Area of Soft Error Tolerant Microprocessors. - Rui Gong; Kui Dai; Zhiying Wang 003 (DFT, 2008)

DBTIM: An Advanced Hardware Assisted Full Virtualization Architecture. - Wei Chen 009; Hongyi Lu; Li Shen 007; Zhiying Wang 003; Nong Xiao 001 (EUC (2), 2008)

An Optimized COW Block Device Driver in VMM for Fast, On-Demand Software Deployment. - Bin Chen; Nong Xiao 001; Zhiping Cai; Zhiying Wang 003 (EUC (2), 2008)

A Novel Hardware Assisted Full Virtualization Technique. - Wei Chen 009; Hongyi Lu; Li Shen 007; Zhiying Wang 003; Nong Xiao 001; Dan Chen 001 (ICYCS, 2008)

Low-Level Component for OpenGL ES Oriented Heterogeneous Architecture with Optimization. - Xinbiao Gan; Kui Dai; Zhiying Wang 003 (ICYCS, 2008)

Transient Fault Recovery on Chip Multiprocessor based on Dual Core Redundancy and Context Saving. - Rui Gong; Kui Dai; Zhiying Wang 003 (ICYCS, 2008)

The P2P Communication Model for a Local Memory based Multi-core Processor. - Jianjun Guo; Kui Dai; Ming-che Lai; Zhiying Wang 003 (ICYCS, 2008)

Performance Bound Analysis and Retiming of Timed Circuits. - Lei Wang 011; Zhiying Wang 003; Kui Dai (ICYCS, 2008)

A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture. - Xinbiao Gan; Kui Dai; Libo Huang; Li Shen 007; Zhiying Wang 003 (MUE, 2008)

Transient Fault Tolerance on Chip Multiprocessor Based on Dual and Triple Core Redundancy. - Rui Gong; Kui Dai; Zhiying Wang 003 (PRDC, 2008)

Hierarchical memory system design for a heterogeneous multi-core processor. - Jianjun Guo; Ming-che Lai; Zhengyuan Pang; Libo Huang; Fangyuan Chen; Kui Dai; Zhiying Wang 003 (SAC, 2008)

Control flow checking and recovering based on 8051 architecture. - Rui Gong; Wei Chen 009; Fang Liu 002; Kui Dai; Zhiying Wang 003 (SAC, 2008)

Research of a Secure File System for Protection of Intellectual Property Right. - Jun Ma 015; Jiangchun Ren; Zhiying Wang 003; Yaokai Zhu (WAIM, 2008)

A New Approach to Single Event Effect Tolerance Based on Asynchronous Circuit Technique. - Rui Gong; Wei Chen 009; Fang Liu 002; Kui Dai; Zhiying Wang 003 (J. Electron. Test., 2008)

A Hardware Approach for Reducing Interpretation Overhead. - Wei Chen 009; Zhiying Wang 003; Hongyi Lu; Li Shen 007; Nong Xiao 001; Zhong Zheng (CIT (1), 2009)

Dynamically utilizing computation accelerators for extensible processors in a software approach. - Ya-Shuai Lü; Li Shen 007; Zhiying Wang 003; Nong Xiao 001 (CODES+ISSS, 2009)

Fast, On-Demand Software Deployment with Lightweight, Independent Virtual Disk Images. - Bin Chen; Nong Xiao 001; Zhiping Cai; Zhiying Wang 003; Ji Wang (GCC, 2009)

An accurate and efficient performance analysis approach based on queuing model for network on chip. - Ming-che Lai; Lei Gao; Nong Xiao 001; Zhiying Wang 003 (ICCAD, 2009)

A Light-weight Code Cache Design for Dynamic Binary Translation. - Wei Chen 009; Li Shen 007; Hongyi Lu; Zhiying Wang 003; Nong Xiao 001 (ICPADS, 2009)

Using Pcache to Speedup Interpretation in Dynamic Binary Translation. - Wei Chen 009; Hongyi Lu; Li Shen 007; Zhiying Wang 003; Nong Xiao 001 (ISPA, 2009)

Virtual Disk Image Reclamation for Software Updates in Virtual Machine Environments. - Bin Chen; Nong Xiao 001; Zhiping Cai; Fuyong Chu; Zhiying Wang 003 (NAS, 2009)

The Design of Asynchronous Microprocessor Based on Optimized NCL_X Design-Flow. - Gang Jin; Lei Wang 011; Zhiying Wang 003 (NAS, 2009)

Implementation of OpenVG Path and Paint Algorithms on Synchronous Data Triggered Architecture with Optimization. - Sheng Ma; Libo Huang; Zhiying Wang 003; Kui Dai (NAS, 2009)

A New Description Language for Data-Driven Asynchronous Circuits and its Design Flow. - Gang Jin; Lei Wang 011; Zhiying Wang 003 (PACCS, 2009)

Optimal subgraph covering for customisable VLIW processors. - Ya-Shuai Lü; Li Shen 007; Libo Huang; Zhiying Wang 003; Nong Xiao 001 (IET Comput. Digit. Tech., 2009)

A Dynamic Binary Translation Framework Based on Page Fault Mechanism in Linux Kernel. - Fan Xu; Li Shen 007; Zhiying Wang 003 (CIT, 2010)

Virtual Network Embedding for Evolving Networks. - Zhiping Cai; Fang Liu 002; Nong Xiao 001; Qiang Liu 004; Zhiying Wang 003 (GLOBECOM, 2010)

SIF: Overcoming the limitations of SIMD devices via implicit permutation. - Libo Huang; Li Shen 007; Zhiying Wang 003; Wei Shi; Nong Xiao 001; Sheng Ma (HPCA, 2010)

SV: Enhancing SIMD Architectures via Combined SIMD-Vector Approach. - Libo Huang; Zhiying Wang 003 (ICA3PP (1), 2010)

DSS: Applying asynchronous techniques to architectures exploiting ILP at compile time. - Wei Shi; Zhiying Wang 003; Hongguang Ren; Ting Cao; Wei Chen 009; Bo Su; Hongyi Lu (ICCD, 2010)

Permutation optimization for SIMD devices. - Libo Huang; Li Shen 007; Zhiying Wang 003 (ISCAS, 2010)

An Emulator for Executing IA-32 Applications on ARM-Based Systems. - Wei Chen 009; Zhiying Wang 003; Dan Chen 001 (J. Comput., 2010)

A Novel Chaining Approach to Indirect Control Transfer Instructions. - Wei Chen 009; Zhiying Wang 003; Qiang Dou; Yongwen Wang (ARES, 2011)

Analytical Models for Data Dependence Violation Checking in TLS. - Xin Lai; Cong Liu 009; Zhiying Wang 003; Quanyou Feng (CIS, 2011)

A specialized low-cost vectorized loop buffer for embedded processors. - Libo Huang; Zhiying Wang 003; Li Shen 007; Hongyi Lu; Nong Xiao 001; Cong Liu 009 (DATE, 2011)

Applying Formal Verification to a Cache Coherence Protocol in TLS. - Xin Lai; Cong Liu 009; Zhiying Wang 003 (EMS, 2011)

A novel shared-buffer router for network-on-chip based on Hierarchical Bit-line Buffer. - Wei Shi; Weixia Xu; Hongguang Ren; Qiang Dou; Zhiying Wang 003; Li Shen 007; Cong Liu 009 (ICCD, 2011)

Mailbook: privacy-protecting social networking via email. - Yong Cheng; Jiangjiang Wu; Songzhu Mei; Zhiying Wang 003; Jun Ma 015; Jiangchun Ren; Ke Yan (ICIMCS, 2011)

A novel file-level continuous data protection mechanism oriented service application. - Jiangjiang Wu; Jiangchun Ren; Yong Cheng; Songzhu Mei; Zhiying Wang 003 (ICIMCS, 2011)

Characterizing Fine-Grain Parallelism on Modern Multicore Platform. - Xuhao Chen 001; Wei Chen 009; Jiawen Li; Zhong Zheng; Li Shen 007; Zhiying Wang 003 (ICPADS, 2011)

A Formalization of an Emulation Based Co-designed Virtual Machine. - Wei Chen 009; Weixia Xu; Zhiying Wang 003; Qiang Dou; Yongwen Wang; Baokang Zhao; Baosheng Wang (IMIS, 2011)

DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip. - Sheng Ma; Natalie D. Enright Jerger; Zhiying Wang 003 (ISCA, 2011)

GSM: An Efficient Code Generation Algorithm for Dynamic Binary Translator. - Xuhao Chen 001; Zhong Zheng; Li Shen 007; Wei Chen 009; Zhiying Wang 003 (PAAP, 2011)

SWHash: An Efficient Data Integrity Verification Scheme Appropriate for USB Flash Disk. - Yong Cheng; Zhiying Wang 003; Jiangjiang Wu; Songzhu Mei; Jiangchun Ren; Jun Ma 015 (TrustCom, 2011)

An Advanced and Effective Literature Search Algorithm Based on Analytic Hierarchy Process. - Qiong Wang 001; Cong Liu 009; Zhiying Wang 003 (TrustCom, 2011)

VerFAT: A Transparent and Efficient Multi-versioning Mechanism for FAT File System. - Jiangjiang Wu; Zhiying Wang 003; Songzhu Mei; Yong Cheng; Jiangchun Ren (TrustCom, 2011)

Structure-Based Deadlock Checking of Asynchronous Circuits. - Hongguang Ren; Zhiying Wang 003; Doug Edwards (J. Comput. Sci. Technol., 2011)

A practical low-latency router architecture with wing channel for on-chip network. - Ming-che Lai; Lei Gao; Sheng Ma; Nong Xiao 001; Zhiying Wang 003 (Microprocess. Microsystems, 2011)

Accelerating NoC-Based MPI Primitives via Communication Architecture Customization. - Libo Huang; Zhiying Wang 003; Nong Xiao 001 (ASAP, 2012)

Re-encryption Optimization in CP-ABE Based Cryptographic Cloud Storage. - Yong Cheng; Jiangchun Ren; Zhiying Wang 003; Songzhu Mei; Jie Zhou (CGC, 2012)

Attributes Union in CP-ABE Algorithm for Large Universe Cryptographic Access Control. - Yong Cheng; Jiangchun Ren; Zhiying Wang 003; Songzhu Mei; Jie Zhou (CGC, 2012)

An optimized multicore cache coherence design for exploiting communication locality. - Libo Huang; Zhiying Wang 003; Nong Xiao 001 (ACM Great Lakes Symposium on VLSI, 2012)

Supporting efficient collective communication in NoCs. - Sheng Ma; Natalie D. Enright Jerger; Zhiying Wang 003 (HPCA, 2012)

Whole packet forwarding: Efficient design of fully adaptive routing algorithms for networks-on-chip. - Sheng Ma; Natalie D. Enright Jerger; Zhiying Wang 003 (HPCA, 2012)

A semantic web service composition dynamic detecting method. - Zhou Jie; Jiangchun Ren; Zhiying Wang 003; Yong Cheng; Songzhu Mei; Jiangjiang Wu (ICDIM, 2012)

Dynamic Optimization on Multi-core Platform. - Jiahui Wen; Li Shen 007; Zhiying Wang 003 (TrustCom, 2012)

HVD-TLS: A Novel Framework of Thread Level Speculation. - Fan Xu; Shen Li; Zhiying Wang 003 (TrustCom, 2012)

Backlog Bounds Analysis of Different On-chip Cache Coherence Policies: A Network Calculus-Based Approch. - Xin Lai; Cong Liu 009; Zhiying Wang 003; Quanyou Feng (UIC/ATC, 2012)

Keys Distributing Optimization of CP-ABE Based Access Control in Cryptographic Cloud Storage. - Yong Cheng; Jiangchun Ren; Zhiying Wang 003; Songzhu Mei; Jie Zhou (IEICE Trans. Inf. Syst., 2012)

Trusted Bytecode Virtual Machine Module: A Novel Method for Dynamic Remote Attestation in Cloud Computing. - Songzhu Mei; Zhiying Wang 003; Yong Cheng; Jiangchun Ren; Jiangjiang Wu; Jie Zhou (Int. J. Comput. Intell. Syst., 2012)

Low-Cost Binary128 Floating-Point FMA Unit Design with SIMD Support. - Libo Huang; Sheng Ma; Li Shen 007; Zhiying Wang 003; Nong Xiao 001 (IEEE Trans. Computers, 2012)

An approach to minimizing the interpretation overhead in Dynamic Binary Translation. - Wei Chen 009; Dan Chen 001; Zhiying Wang 003 (J. Supercomput., 2012)

Transient Fault Tolerant QDI Interconnects Using Redundant Check Code. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (DSD, 2013)

DCP: Improving the Throughput of Asynchronous Pipeline by Dual Control Path. - Bo Su; Li Shen 007; Lei Wang 011; Zhiying Wang 003; Yourui Wang; Libo Huang; Wei Shi (HPCC/EUC, 2013)

HEUSPEC: A Software Speculation Parallel Model. - Fan Xu; Li Shen 007; Zhiying Wang 003; Hui Guo 004; Bo Su; Wei Chen 009 (ICPP, 2013)

An accurate and highly-efficient performance evaluation approach based on queuing model for on-chip network. - Ming-che Lai; Lei Gao; Nong Xiao 001; Zhiying Wang 003 (Sci. China Inf. Sci., 2013)

Region-Based Way-Partitioning on L1 Data Cache for Low Power. - Zhong Zheng; Zhiying Wang 003; Li Shen 007 (IEICE Trans. Inf. Syst., 2013)

Efficient revocation in ciphertext-policy attribute-based encryption based cryptographic cloud storage. - Yong Cheng; Zhiying Wang 003; Jun Ma 015; Jiangjiang Wu; Songzhu Mei; Jiangchun Ren (J. Zhejiang Univ. Sci. C, 2013)

VBON: Toward efficient on-chip networks via hierarchical virtual bus. - Libo Huang; Zhiying Wang 003; Nong Xiao 001 (Microprocess. Microsystems, 2013)

Efficient multimedia coprocessor with enhanced SIMD engines for exploiting ILP and DLP. - Libo Huang; Nong Xiao 001; Zhiying Wang 003; Yongwen Wang; Ming-che Lai (Parallel Comput., 2013)

Adaptive communication mechanism for accelerating MPI functions in NoC-based multicore processors. - Libo Huang; Zhiying Wang 003; Nong Xiao 001; Yongwen Wang; Qiang Dou (ACM Trans. Archit. Code Optim., 2013)

Dynamic Streamization Model Execution for SIMD Engines on Multicore Architectures. - Libo Huang; Zhiying Wang 003; Nong Xiao 001; Yongwen Wang; Qiang Dou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Customized Core Layout: A Case Study on Dual-Core Dynamic Binary Translation System. - Fan Xu; Li Shen 007; Zhiying Wang 003; Hui Guo 004; Bo Su; Wei Chen 009 (CIT, 2014)

Dynamic Power Estimation with Hardware Performance Counters Support on Multi-core Platform. - Xin Liu; Li Shen 007; Cheng Qian 006; Zhiying Wang 003 (ACA, 2014)

An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (ASYNC, 2014)

Improving Speculation Accuracy with Inter-thread Fetching Value Prediction. - Fan Xu; Li Shen 007; Zhiying Wang 003; Hui Guo 004; Bo Su; Wei Chen 009 (ICA3PP (2), 2014)

Adaptive Cache Bypass and Insertion for Many-core Accelerators. - Xuhao Chen 001; Shengzhao Wu; Li-Wen Chang; Wei-Sheng Huang; Carl Pearson; Zhiying Wang 003; Wen-mei W. Hwu (MES, 2014)

Tag check elision. - Zhong Zheng; Zhiying Wang 003; Mikko H. Lipasti (ISLPED, 2014)

Understanding Co-run Degradations on Integrated Heterogeneous Processors. - Qi Zhu; Bo Wu 002; Xipeng Shen; Li Shen 007; Zhiying Wang 003 (LCPC, 2014)

Adaptive Cache Management for Energy-Efficient GPU Computing. - Xuhao Chen 001; Li-Wen Chang; Christopher I. Rodrigues; Jie Lv; Zhiying Wang 003; Wen-mei W. Hwu (MICRO, 2014)

PPEP: Online Performance, Power, and Energy Prediction Framework and DVFS Space Exploration. - Bo Su; Junli Gu; Li Shen 007; Wei Huang 004; Joseph L. Greathouse; Zhiying Wang 003 (MICRO, 2014)

JVM-Based Dynamic Attestation in Cloud Computing. - Haihe Ba; Zhiying Wang 003; Jiangchun Ren; Huaizhe Zhou (TrustCom, 2014)

Implementing a Leading Loads Performance Predictor on Commodity Processors. - Bo Su; Joseph L. Greathouse; Junli Gu; Michael Boyer; Li Shen 007; Zhiying Wang 003 (USENIX ATC, 2014)

Binary compatibility for embedded systems using greedy subgraph mapping. - Xuhao Chen 001; Li Shen 007; Zhiying Wang 003; Zhong Zheng; Wei Chen 009 (Sci. China Inf. Sci., 2014)

Efficient Utilization of SIMD Engines for General-Purpose Processors. - Libo Huang; Zhiying Wang 003; Nong Xiao 001; Qiang Dou (Comput. J., 2014)

A comprehensive comparison between virtual cut-through and wormhole routers for cache coherent Network on-Chips. - Peng Wang 036; Sheng Ma; Hongyi Lu; Zhiying Wang 003 (IEICE Electron. Express, 2014)

Mac or Non-MAC: not a Problem. - Libo Huang; Li Shen 007; Yashuai Lv; Zhiying Wang 003; Kui Dai (J. Circuits Syst. Comput., 2014)

Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (Microprocess. Microsystems, 2014)

Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs. - Sheng Ma; Natalie D. Enright Jerger; Zhiying Wang 003; Ming-che Lai; Libo Huang (IEEE Trans. Computers, 2014)

Integrated Coherence Prediction: Towards Efficient Cache Coherence on NoC-Based Multicore Architectures. - Libo Huang; Zhiying Wang 003; Nong Xiao 001; Yongwen Wang; Qiang Dou (ACM Trans. Design Autom. Electr. Syst., 2014)

Novel Flow Control for Fully Adaptive Routing in Cache-Coherent NoCs. - Sheng Ma; Zhiying Wang 003; Natalie D. Enright Jerger; Li Shen 007; Nong Xiao 001 (IEEE Trans. Parallel Distributed Syst., 2014)

Adaptive remaining hop count flow control: Consider the interaction between packets. - Peng Wang 036; Sheng Ma; Hongyi Lu; Zhiying Wang 003; Chen Li 015 (ASP-DAC, 2015)

Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults. - Guangda Zhang; Jim D. Garside; Wei Song 002; Javier Navaridas; Zhiying Wang 003 (ASYNC, 2015)

Software Engagement with Sleeping CPUs. - Qi Zhu; Meng Zhu; Bo Wu 002; Xipeng Shen; Kai Shen; Zhiying Wang 003 (HotOS, 2015)

Application-Assisted Dynamic Attestation for JVM-Based Cloud. - Haihe Ba; Huaizhe Zhou; Zhiying Wang 003; Jiangchun Ren; Tie Hong; Yiming Li (ICA3PP (Workshops and Symposiums), 2015)

A Study on Non-volatile 3D Stacked Memory for Big Data Applications. - Cheng Qian 006; Libo Huang; Peng Xie; Nong Xiao 001; Zhiying Wang 003 (ICA3PP (1), 2015)

Efficient data management on 3D stacked memory for big data applications. - Cheng Qian 006; Libo Huang; Peng Xie; Nong Xiao 001; Zhiying Wang 003 (IDT, 2015)

Adaptive Cache and Concurrency Allocation on GPGPUs. - Zhong Zheng; Zhiying Wang 003; Mikko H. Lipasti (IEEE Comput. Archit. Lett., 2015)

Activity recognition with weighted frequent patterns mining in smart environments. - Jiahui Wen; Mingyang Zhong; Zhiying Wang 003 (Expert Syst. Appl., 2015)

Leaving One Slot Empty: Flit Bubble Flow Control for Torus Cache-Coherent NoCs. - Sheng Ma; Zhiying Wang 003; Zonglin Liu; Natalie D. Enright Jerger (IEEE Trans. Computers, 2015)

A high performance reliable NoC router. - Lu Wang 019; Sheng Ma; Zhiying Wang 003 (ASP-DAC, 2016)

A low-cost conflict-free NoC for GPGPUs. - Xia Zhao 004; Sheng Ma; Yuxi Liu; Lieven Eeckhout; Zhiying Wang 003 (DAC, 2016)

A Hybrid Power-Performance Adjustment Strategy for Clustered Multi-threading Architecture. - Jingwei Chen; Qiong Wang 001; Bo Su; Li Shen 007; Zhiying Wang 003 (HPCC/SmartCity/DSS, 2016)

OBC Based Optimization of Re-encryption for Cryptographic Cloud Storage. - Huidong Qiao; Jiangchun Ren; Zhiying Wang 003; Haihe Ba; Huaizhe Zhou; Tie Hong (ICA3PP, 2016)

A heterogeneous low-cost and low-latency Ring-Chain network for GPGPUs. - Xia Zhao 004; Sheng Ma; Chen Li 015; Lieven Eeckhout; Zhiying Wang 003 (ICCD, 2016)

A lightweight instruction-set simulator for teaching of dynamic instruction scheduling. - Wenjie Liu; Li Shen 007; Zhiying Wang 003 (ICCSE, 2016)

An implementation of analytical power model on integrated GPU. - Ning Li; Li Shen 007; Qi Zhu; Yemao Xu; Jialong Wang; Zhiying Wang 003 (ISIC, 2016)

Dynamic Power-Performance Adjustment on Clustered Multi-Threading Processors. - Jingwei Chen; Li Shen 007; Zhiying Wang 003; Ning Li; Yemao Xu (NAS, 2016)

User-policy-based dynamic remote attestation in cloud computing. - Haihe Ba; Jiangchun Ren; Zhiying Wang 003; Huaizhe Zhou; Yiming Li; Tie Hong (Int. J. Embed. Syst., 2016)

Sensor-based adaptive activity recognition with dynamically available sensors. - Jiahui Wen; Zhiying Wang 003 (Neurocomputing, 2016)

Optimization Strategies Oriented to Loop Characteristics in Software Thread Level Speculation Systems. - Li Shen 007; Fan Xu; Zhiying Wang 003 (J. Comput. Sci. Technol., 2016)

面向Cassandra数据库的高效动态数据管理机制 (Efficient and Dynamic Data Management System for Cassandra Database). - Boqian Wang; Qi Yu 003; Xin Liu; Li Shen 007; Zhiying Wang 003; Wei Chen 009 (计算机科学, 2016)

GPU平台上面向性能和功耗的分支优化 (Branch Divergence Optimization for Performance and Power Consumption on GPU Platform). - Qi Yu 003; Boqian Wang; Li Shen 007; Zhiying Wang 003; Wei Chen 009 (计算机科学, 2016)

A runtime fault-tolerant routing algorithm based on region flooding in NoCs. - Lu Wang 019; Sheng Ma; Zhiying Wang 003 (Microprocess. Microsystems, 2016)

A Software-Hardware Co-designed Methodology for Efficient Thread Level Speculation. - Qiong Wang 001; Jialong Wang; Li Shen 007; Zhiying Wang 003 (CIT, 2017)

BC-AMAT: Considering Blocked Time in Memory System Measurement. - Qi Yu 003; Libo Huang; Cheng Qian 006; Zhiying Wang 003 (Conf. Computing Frontiers, 2017)

Trace-based method for big data memory characteristics research. - Jianqiao Ma; Qi Yu 003; Libo Huang; Cheng Qian 006; Zhiying Wang 003 (ICACCI, 2017)

Efficient CP-ABE with Non-monotonic Access Structures. - Yong Cheng; Huaizhe Zhou; Jun Ma 015; Zhiying Wang 003 (ICCCS (2), 2017)

A Novel Statistical Power Model for Integrated GPU with Optimization. - Qiong Wang 001; Ning Li; Li Shen 007; Zhiying Wang 003 (ICPCSEE (2), 2017)

Co-Run Scheduling with Power Cap on Integrated CPU-GPU Systems. - Qi Zhu; Bo Wu 002; Xipeng Shen; Li Shen 007; Zhiying Wang 003 (IPDPS, 2017)

OTR: A Fine-Grained Dynamic Power Scaling Pipeline Based on Trace. - Sijiang Fan; Jiawei Fei; Ximing He; Li Shen 007; Zhiying Wang 003 (ISPA/IUCC, 2017)

Parallel Computing in DNNs Using CPU and MIC. - Sijiang Fan; Shiqing Zhang; Ximing He; Jiawei Fei; Li Shen 007; Zhiying Wang 003 (ISPA/IUCC, 2017)

Unleashing the power of GPU for physically-based rendering via dynamic ray shuffling. - Ya-Shuai Lü; Libo Huang; Li Shen 007; Zhiying Wang 003 (MICRO, 2017)

A Novel Approach to Reduce Packet Latency Increase Caused by Power Gating in Network-on-Chip. - Peng Wang 036; Sobhan Niknam; Zhiying Wang 003; Todor P. Stefanov (NOCS, 2017)

Motivating Students through Peer-Formulated Assignments in CS Experimental Courses. - Xin Zhang; Jinfeng Huang; Libo Huang; Zhiying Wang 003 (SIGITE, 2017)

Decoupling Security Services from IaaS Cloud Through Remote Virtual Machine Introspection. - Huaizhe Zhou; Haihe Ba; Jiangchun Ren; Yongjun Wang; Zhiying Wang 003; Yunshi Li (SpaCCS, 2017)

Runtime Measurement Architecture for Bytecode Integrity in JVM-Based Cloud. - Haihe Ba; Huaizhe Zhou; Jiangchun Ren; Zhiying Wang 003 (SRDS, 2017)

Factor-Based C-AMAT Analysis for Memory Optimization. - Qi Yu 003; Libo Huang; Cheng Qian 006; Jianqiao Ma; Zhiying Wang 003 (VECoS, 2017)

Efficient and high-quality sparse graph coloring on GPUs. - Xuhao Chen 001; Pingfan Li; Jianbin Fang; Tao Tang 001; Zhiying Wang 003; Canqun Yang (Concurr. Comput. Pract. Exp., 2017)

Learning general model for activity recognition with limited labelled data. - Jiahui Wen; Zhiying Wang 003 (Expert Syst. Appl., 2017)

Understanding co-run performance on CPU-GPU integrated processors: observations, insights, directions. - Qi Zhu; Bo Wu 002; Xipeng Shen; Kai Shen; Li Shen 007; Zhiying Wang 003 (Frontiers Comput. Sci., 2017)

A high performance reliable NoC router. - Lu Wang 019; Sheng Ma; Chen Li 015; Wei Chen 009; Zhiying Wang 003 (Integr., 2017)

UTrustDisk: An Efficient Data Protection Scheme for Building Trusted USB Flash Disk. - Yong Cheng; Jun Ma 015; Jiangchun Ren; Songzhu Mei; Zhiying Wang 003 (KSII Trans. Internet Inf. Syst., 2017)

Improving the Efficiency of GPGPU Work-Queue Through Data Awareness. - Libo Huang; Ya-Shuai Lü; Li Shen 007; Zhiying Wang 003 (ACM Trans. Archit. Code Optim., 2017)

Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

CMH: compression management for improving capacity in the hybrid memory cube. - Cheng Qian 006; Libo Huang; Qi Yu 003; Zhiying Wang 003; Bruce R. Childers (CF, 2018)

Peer-Formulated Assignment Method for Experimental Projects in CS courses. - Xin Zhang; Libo Huang; Zhiying Wang 003; Qi Yu 003 (FIE, 2018)

Efficient Data Communication between CPU and GPU through Transparent Partial-Page Migration. - Shiqing Zhang; YaoHua Yang; Li Shen 007; Zhiying Wang 003 (HPCC/SmartCity/DSS, 2018)

VISU: A Simple and Efficient Cache Coherence Protocol Based on Self-updating. - Ximing He; Sheng Ma; Wenjie Liu; Sijiang Fan; Libo Huang; Zhiying Wang 003; Zhanyong Zhou (ICA3PP (4), 2018)

Classification-Driven Search for Effective SM Partitioning in Multitasking GPUs. - Xia Zhao 004; Zhiying Wang 003; Lieven Eeckhout (ICS, 2018)

Intra-Cluster Coalescing to Reduce GPU NoC Pressure. - Lu Wang 019; Xia Zhao 004; David R. Kaeli; Zhiying Wang 003; Lieven Eeckhout (IPDPS, 2018)

Adaptive VC Partitioning for NoCs in GPGPUs. - Sheng Ma; Hongyi Lu; Libo Huang; Li Shen 007; Yang Guo 003; Zhiying Wang 003; Wenliang Xue (ISCAS, 2018)

Improving Branch Prediction Accuracy on Multi-Core Architectures for Big Data. - Qi Yu 003; Libo Huang; Hui Guo 004; Cheng Qian 006; Sheng Ma; Zhiying Wang 003 (ISPA/IUCC/BDCloud/SocialCom/SustainCom, 2018)

HMCSP: Reducing Transaction Latency of CSR-based SPMV in Hybrid Memory Cube. - Cheng Qian 006; Bruce R. Childers; Libo Huang; Qi Yu 003; Zhiying Wang 003 (ISPASS, 2018)

Evaluating Memory Performance of Emerging Scale-Out Applications Using C-AMAT. - Qi Yu 003; Libo Huang; Cheng Qian 006; Jianqiao Ma; Zhiying Wang 003 (ISPASS, 2018)

GPU Memory Management Solution Supporting Incomplete Pages. - Li Shen 007; Shiqing Zhang; YaoHua Yang; Zhiying Wang 003 (NPC, 2018)

Accelerating BFS via Data Structure-Aware Prefetching on GPU. - Hui Guo 004; Libo Huang; Ya-Shuai Lü; Jianqiao Ma; Cheng Qian 006; Sheng Ma; Zhiying Wang 003 (IEEE Access, 2018)

DyCache: Dynamic Multi-Grain Cache Management for Irregular Memory Accesses on GPU. - Hui Guo 004; Libo Huang; Ya-Shuai Lü; Sheng Ma; Zhiying Wang 003 (IEEE Access, 2018)

Resolving the GPU responsiveness dilemma through program transformations. - Qi Zhu; Bo Wu 002; Xipeng Shen; Kai Shen; Li Shen 007; Zhiying Wang 003 (Frontiers Comput. Sci., 2018)

Compulsory traceable ciphertext-policy attribute-based encryption against privilege abuse in fog computing. - Huidong Qiao; Jiangchun Ren; Zhiying Wang 003; Haihe Ba; Huaizhe Zhou (Future Gener. Comput. Syst., 2018)

The Design of NoC-Side Memory Access Scheduling for Energy-Efficient GPGPUs. - Wenjie Liu; Sheng Ma; Libo Huang; Zhiying Wang 003 (Int. J. Parallel Program., 2018)

FC-AMAT: factor-based C-AMAT analysis in memory system measurement. - Qi Yu 003; Libo Huang; Cheng Qian 006; Jianqiao Ma; Zhiying Wang 003 (Innov. Syst. Softw. Eng., 2018)

CHAM: Improving Prefetch Efficiency Using a Composite Hierarchy-Aware Method. - Cheng Qian 006; Libo Huang; Qi Yu 003; Zhiying Wang 003 (J. Circuits Syst. Comput., 2018)

Orchestrating parallel detection of strongly connected components on GPUs. - Xuhao Chen 001; Cheng Chen 005; Jie Shen 003; Jianbin Fang; Tao Tang 001; Canqun Yang; Zhiying Wang 003 (Parallel Comput., 2018)

Astrape: An Efficient Concurrent Cloud Attestation with Ciphertext-Policy Attribute-Based Encryption. - Haihe Ba; Huaizhe Zhou; Songzhu Mei; Huidong Qiao; Tie Hong; Zhiying Wang 003; Jiangchun Ren (Symmetry, 2018)

RIM4J: An Architecture for Language-Supported Runtime Measurement against Malicious Bytecode in Cloud Computing. - Haihe Ba; Huaizhe Zhou; Huidong Qiao; Zhiying Wang 003; Jiangchun Ren (Symmetry, 2018)

A Novel Vertical Fragmentation Method for Privacy Protection Based on Entropy Minimization in a Relational Database. - Tie Hong; Songzhu Mei; Zhiying Wang 003; Jiangchun Ren (Symmetry, 2018)

Practical, Provably Secure, and Black-Box Traceable CP-ABE for Cryptographic Cloud Storage. - Huidong Qiao; Haihe Ba; Huaizhe Zhou; Zhiying Wang 003; Jiangchun Ren; Ying Hu (Symmetry, 2018)

Surf-Bless: A Confined-interference Routing for Energy-Efficient Communication in NoCs. - Peng Wang 036; Sobhan Niknam; Sheng Ma; Zhiying Wang 003; Todor P. Stefanov (DAC, 2019)

Improving the DRAM Access Efficiency for Matrix Multiplication on Multicore Accelerators. - Sheng Ma; Yang Guo 003; Shenggang Chen; Libo Huang; Zhiying Wang 003 (DATE, 2019)

EVC-Based Power Gating Approach to Achieve Low-Power and High Performance NoC. - Peng Wang 036; Sobhan Niknam; Sheng Ma; Zhiying Wang 003; Todor P. Stefanov (DSD, 2019)

A Dynamic Bypass Approach to Realize Power Efficient Network-on-Chip. - Peng Wang 036; Sobhan Niknam; Sheng Ma; Zhiying Wang 003; Todor P. Stefanov (HPCC/SmartCity/DSS, 2019)

Adaptive memory-side last-level GPU caching. - Xia Zhao 004; Almutaz Adileh; Zhibin Yu 001; Zhiying Wang 003; Aamer Jaleel; Lieven Eeckhout (ISCA, 2019)

An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators. - Sheng Ma; Libo Huang; Yuanwu Lei; Yang Guo 003; Zhiying Wang 003 (ISCAS, 2019)

Hierarchical Page Eviction Policy for Unified Memory in GPUs. - Qi Yu 003; Bruce R. Childers; Libo Huang; Cheng Qian 006; Zhiying Wang 003 (ISPASS, 2019)

MT-DMA: A DMA Controller Supporting Efficient Matrix Transposition for Digital Signal Processing. - Sheng Ma; Yuanwu Lei; Libo Huang; Zhiying Wang 003 (IEEE Access, 2019)

Modeling Emerging Memory-Divergent GPU Applications. - Lu Wang 019; Magnus Jahre; Almutaz Adileh; Zhiying Wang 003; Lieven Eeckhout (IEEE Comput. Archit. Lett., 2019)

PRODA: improving parallel programs on GPUs through dependency analysis. - Xiong Wei; Ming Hu; Tao Peng 006; Minghua Jiang; Zhiying Wang 003; Xiao Qin 001 (Clust. Comput., 2019)

Real-Time Head Action Recognition Based on HOF and ELM. - Tie Hong; Yuan Wei Li; Zhiying Wang 003 (IEICE Trans. Inf. Syst., 2019)

Fast In-Memory Key-Value Cache System with RDMA. - Wei Chen 009; Songping Yu; Zhiying Wang 003 (J. Circuits Syst. Comput., 2019)

SIMD stealing: Architectural support for efficient data parallel execution on multicores. - Libo Huang; Ya-Shuai Lü; Sheng Ma; Nong Xiao 001; Zhiying Wang 003 (Microprocess. Microsystems, 2019)

A statistic approach for power analysis of integrated GPU. - Qiong Wang 001; Ning Li; Li Shen 007; Zhiying Wang 003 (Soft Comput., 2019)

Tenant-Oriented Monitoring for Customized Security Services in the Cloud. - Huaizhe Zhou; Haihe Ba; Yongjun Wang; Zhiying Wang 003; Jun Ma 015; Yunshi Li; Huidong Qiao (Symmetry, 2019)

Intra-Cluster Coalescing and Distributed-Block Scheduling to Reduce GPU NoC Pressure. - Lu Wang 019; Xia Zhao 004; David R. Kaeli; Zhiying Wang 003; Lieven Eeckhout (IEEE Trans. Computers, 2019)

CD-Xbar: A Converge-Diverge Crossbar Network for High-Performance GPUs. - Xia Zhao 004; Sheng Ma; Zhiying Wang 003; Natalie D. Enright Jerger; Lieven Eeckhout (IEEE Trans. Computers, 2019)

Application-aware NoC management in GPUs multitasking. - Zhen Xu 004; Xia Zhao 004; Zhiying Wang 003; Canqun Yang (J. Supercomput., 2019)

Coordinated DMA: Improving the DRAM Access Efficiency for Matrix Multiplication. - Sheng Ma; Zhong Liu 003; Shenggang Chen; Libo Huang; Yang Guo 003; Zhiying Wang 003; Meidi Zhang (IEEE Trans. Parallel Distributed Syst., 2019)

HeteroCore GPU to Exploit TLP-Resource Diversity. - Xia Zhao 004; Zhiying Wang 003; Lieven Eeckhout (IEEE Trans. Parallel Distributed Syst., 2019)

Attention Unet++: A Nested Attention-Aware U-Net for Liver CT Image Segmentation. - Chen Li 034; Yusong Tan; Wei Chen 009; Xin Luo 009; Yuanming Gao; Xiaogang Jia; Zhiying Wang 003 (ICIP, 2020)

Coordinated Page Prefetch and Eviction for Memory Oversubscription Management in GPUs. - Qi Yu 003; Bruce R. Childers; Libo Huang; Cheng Qian 006; Hui Guo 004; Zhiying Wang 003 (IPDPS, 2020)

Application of U-Shaped Convolutional Neural Network Based on Attention Mechanism in Liver CT Image Segmentation. - Chen Li 034; Wei Chen 009; Xin Luo 009; Mingfei Wu; Xiaogang Jia; Yusong Tan; Zhiying Wang 003 (MICAD, 2020)

Transparent partial page migration between CPU and GPU. - Shiqing Zhang; Zheng Qin 002; YaoHua Yang; Li Shen 007; Zhiying Wang 003 (Frontiers Comput. Sci., 2020)

HPE: Hierarchical Page Eviction Policy for Unified Memory in GPUs. - Qi Yu 003; Bruce R. Childers; Libo Huang; Cheng Qian 006; Zhiying Wang 003 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A quantitative evaluation of unified memory in GPUs. - Qi Yu 003; Bruce R. Childers; Libo Huang; Cheng Qian 006; Zhiying Wang 003 (J. Supercomput., 2020)

GraphPEG: Accelerating Graph Processing on GPUs. - Ya-Shuai Lü; Hui Guo 004; Libo Huang; Qi Yu 003; Li Shen 007; Nong Xiao 001; Zhiying Wang 003 (ACM Trans. Archit. Code Optim., 2021)

Disabling Tracing in Black-Box-Traceable CP-ABE System: Alert Decryption Black Box. - Huidong Qiao; Jiangchun Ren; Zhiying Wang 003; Ying Hu (Symmetry, 2024)