A Case Study of Hardware and Software Synthesis in ForSyDe. - Ingo Sander; Axel Jantsch; Zhonghai Lu (ISSS, 2002)

NoC Application Programming Interfaces. - Zhonghai Lu; Raimo Haukilahti (Networks on Chip, 2003)

Development and Application of Design Transformations in ForSyDe. - Ingo Sander; Axel Jantsch; Zhonghai Lu (DATE, 2003)

Flit admission in on-chip wormhole-switched networks with virtual channels. - Zhonghai Lu; Axel Jantsch (SoC, 2004)

Feasibility analysis of messages for on-chip networks using wormhole routing. - Zhonghai Lu; Axel Jantsch; Ingo Sander (ASP-DAC, 2005)

Refinement of Perfectly Synchronous Communication Model. - Zhonghai Lu; Ingo Sander; Axel Jantsch (FDL, 2005)

Traffic Configuration for Evaluating Networks on Chips. - Zhonghai Lu; Axel Jantsch (IWSOC, 2005)

Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. - Zhonghai Lu; Ingo Sander; Axel Jantsch (DSD, 2006)

Evaluation of on-chip networks using deflection routing. - Zhonghai Lu; Mingchen Zhong; Axel Jantsch (ACM Great Lakes Symposium on VLSI, 2006)

Connection-oriented Multicasting in Wormhole-switched Networks on Chip. - Zhonghai Lu; Bei Yin; Axel Jantsch (ISVLSI, 2006)

Layered Switching for Networks on Chip. - Zhonghai Lu; Ming Liu 011; Axel Jantsch (DAC, 2007)

Traffic Splitting with Network Calculus for Mesh Sensor Networks. - Huimin She; Zhonghai Lu; Axel Jantsch; Li-Rong Zheng 001; Dian Zhou (FGCN (2), 2007)

Hardware/Software Co-design of a General-Purpose Computation Platform in Particle Physics. - Ming Liu 011; Wolfgang Kuehn; Zhonghai Lu; Axel Jantsch; Shuo Yang; Tiago Perez; Zhen'An Liu (FPT, 2007)

Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. - Zhonghai Lu; Axel Jantsch (ICCAD, 2007)

Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. - Zhonghai Lu; Jonas Sicking; Ingo Sander; Axel Jantsch (IEEE International Workshop on Rapid System Prototyping, 2007)

Admitting and ejecting flits in wormhole-switched networks on chip. - Zhonghai Lu; Axel Jantsch (IET Comput. Digit. Tech., 2007)

Design and Analysis of On-Chip Communication for Network-on-Chip Platforms. - Zhonghai Lu (2007)

Dynamic TDM virtual circuit implementation for NoC. - Yu Wang 002; Kai Zhou; Zhonghai Lu; Huazhong Yang (APCCAS, 2008)

Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip. - Zhonghai Lu; Lei Xia; Axel Jantsch (DDECS, 2008)

System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments. - Ming Liu 011; Wolfgang Kuehn; Zhonghai Lu; Axel Jantsch (DSD, 2008)

ATCA-based computation platform for data acquisition and triggering in particle physics experiments. - Ming Liu 011; Johannes Lang; Shuo Yang; Tiago Perez; Wolfgang Kuehn; Hao Xu; Dapeng Jin; Qiang Wang; Lu Li; Zhen'An Liu; Zhonghai Lu; Axel Jantsch (FPL, 2008)

TDM Virtual-Circuit Configuration for Network-on-Chip. - Zhonghai Lu; Axel Jantsch (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh. - Matt Grange; Awet Yemane Weldezion; Dinesh Pamunuwa; Roshan Weerasekera; Zhonghai Lu; Axel Jantsch; Dave Shippen (3DIC, 2009)

3-D memory organization and performance analysis for multi-processor network-on-chip architecture. - Awet Yemane Weldezion; Zhonghai Lu; Roshan Weerasekera; Hannu Tenhunen (3DIC, 2009)

Analysis of communication delay bounds for network on chips. - Yue Qian; Zhonghai Lu; Wenhua Dou (ASP-DAC, 2009)

Applying network calculus for performance analysis of self-similar traffic in on-chip networks. - Yue Qian; Zhonghai Lu; Wenhua Dou (CODES+ISSS, 2009)

Flow regulation for on-chip communication. - Zhonghai Lu; Mikael Millberg; Axel Jantsch; Alistair C. Bruce; Pieter van der Wolf; Tomas Henriksson (DATE, 2009)

Exploration of Slot Allocation for On-Chip TDM Virtual Circuits. - Li Tong; Zhonghai Lu; Hua Zhang (DSD, 2009)

Run-time Partial Reconfiguration speed investigation and architectural design space exploration. - Ming Liu 011; Wolfgang Kuehn; Zhonghai Lu; Axel Jantsch (FPL, 2009)

From 2D to 3D NoCs: A case study on worst-case communication performance. - Yue Qian; Zhonghai Lu; Wenhua Dou (ICCAD, 2009)

Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip. - Yue Qian; Zhonghai Lu; Wenhua Dou (NOCS, 2009)

Scalability of network-on-chip communication architecture for 3-D meshes. - Awet Yemane Weldezion; Matt Grange; Dinesh Pamunuwa; Zhonghai Lu; Axel Jantsch; Roshan Weerasekera; Hannu Tenhunen (NOCS, 2009)

A Reconfigurable Design Framework for FPGA Adaptive Computing. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Shuo Yang; Axel Jantsch (ReConFig, 2009)

A flow regulator for On-Chip Communication. - Zhonghai Lu; Dimitris Brachos; Axel Jantsch (SoCC, 2009)

Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks. - Huimin She; Zhonghai Lu; Axel Jantsch; Dian Zhou; Li-Rong Zheng 001 (VTC Spring, 2009)

Worst-Case Flit and Packet Delay Bounds in Wormhole Networks on Chip. - Yue Qian; Zhonghai Lu; Wenhua Dou (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Analyzing Credit-Based Router-to-Router Flow Control for On-Chip Networks. - Yue Qian; Zhonghai Lu; Wenhua Dou; Qiang Dou (IEICE Trans. Electron., 2009)

Scalability of relaxed consistency models in NoC based multicore architectures. - Abdul Naeem; Xiaowen Chen; Zhonghai Lu; Axel Jantsch (SIGARCH Comput. Archit. News, 2009)

Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen (DATE, 2010)

Optimal regulation of traffic flows in networks-on-chip. - Fahimeh Jafari; Zhonghai Lu; Axel Jantsch; Mohammad Hossien Yaghmaee (DATE, 2010)

FPGA-based adaptive computing for correlated multi-stream processing. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (DATE, 2010)

COSMO: CO-Simulation with MATLAB and OMNeT++ for Indoor Wireless Networks. - Zhi Zhang; Zhonghai Lu; Qiang Chen 014; Xiaolang Yan; Li-Rong Zheng 001 (GLOBECOM, 2010)

A Low Delay Multiple Reader Passive RFID System Using Orthogonal TH-PPM IR-UWB. - Zhi Zhang; Zhonghai Lu; Zhibo Pang; Xiaolang Yan; Qiang Chen 014; Li-Rong Zheng 001 (ICCCN, 2010)

QoS scheduling for NoCs: Strict Priority Queueing versus Weighted Round Robin. - Yue Qian; Zhonghai Lu; Qiang Dou (ICCD, 2010)

Scalability of weak consistency in NoC based multicore architectures. - Abdul Naeem; Xiaowen Chen; Zhonghai Lu; Axel Jantsch (ISCAS, 2010)

The MOSART Mapping Optimization for Multi-Core ARchiTectures. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI (Selected papers), 2010)

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI, 2010)

Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Jianzhuang Lu; Hucheng Wu (ISVLSI, 2010)

Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (ISVLSI, 2010)

A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Jinwen Li; Minxuan Zhang (NoCArc@MICRO, 2010)

A framework for designing congestion-aware deterministic routing. - Abbas Eslami Kiasari; Axel Jantsch; Zhonghai Lu (NoCArc@MICRO, 2010)

Run-Time Partitioning of Hybrid Distributed Shared Memory on Multi-core Network-on-Chips. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen (PAAP, 2010)

Reducing FPGA Reconfiguration Time Overhead using Virtual Configurations. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (ReCoSoC, 2010)

Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen (SoCC, 2010)

FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Jinwen Li; Minxuan Zhang (SoCC, 2010)

System-level exploration of mesh-based NoC architectures for multimedia applications. - Ning Ma; Zhonghai Lu; Zhibo Pang; Li-Rong Zheng 001 (SoCC, 2010)

Buffer Optimization in Network-on-Chip Through Flow Regulation. - Fahimeh Jafari; Zhonghai Lu; Axel Jantsch; Mohammad Hossien Yaghmaee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Analysis of Worst-Case Delay Bounds for On-Chip Packet-Switching Networks. - Yue Qian; Zhonghai Lu; Wenhua Dou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (ARC, 2011)

Evaluation of deflection routing on various NoC topologies. - Chaochao Feng; Jinwen Li; Zhonghai Lu; Axel Jantsch; Minxuan Zhang (ASICON, 2011)

Power-efficient tree-based multicast support for Networks-on-Chip. - Wenmin Hu; Zhonghai Lu; Axel Jantsch; Hengzhu Liu (ASP-DAC, 2011)

Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems. - Abdul Naeem; Xiaowen Chen; Zhonghai Lu; Axel Jantsch (ASP-DAC, 2011)

Jamming-resilient multi-radio multi-channel multihop wireless network for smart grid. - Hai Su; Meikang Qiu; Huimin Chen; Zhonghai Lu; Xiao Qin 001 (CSIIRW, 2011)

Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems. - Abdul Naeem; Axel Jantsch; Xiaowen Chen; Zhonghai Lu (DSD, 2011)

Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling. - Fahimeh Jafari; Axel Jantsch; Zhonghai Lu (ICCD, 2011)

A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip. - Chaochao Feng; Minxuan Zhang; Jinwen Li; Jiang Jiang; Zhonghai Lu; Axel Jantsch (ISVLSI, 2011)

Cross clock-domain TDM virtual circuits for networks on chips. - Zhonghai Lu (NOCS, 2011)

Stochastic coverage in event-driven sensor networks. - Huimin She; Zhonghai Lu; Axel Jantsch; Dian Zhou; Li-Rong Zheng 001 (PIMRC, 2011)

Network-on-Chip multicasting with low latency path setup. - Wenmin Hu; Zhonghai Lu; Axel Jantsch; Hengzhu Liu; Botao Zhang; Dongpei Liu (VLSI-SoC, 2011)

Modeling and analysis of Rayleigh fading channels using stochastic network calculus. - Huimin She; Zhonghai Lu; Axel Jantsch; Dian Zhou; Li-Rong Zheng 001 (WCNC, 2011)

A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments. - Ming Liu 011; Wolfgang Kuehn; S. Lange; Shuo Yang; J. Roskoss; Zhonghai Lu; Axel Jantsch; Qiang Wang; Hao Xu; Dapeng Jin (Comput. Sci. Eng., 2011)

FPGA-Based Particle Recognition in the HADES Experiment. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (IEEE Des. Test Comput., 2011)

Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations. - Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Zhonghai Lu; Dimitrios Soudris; Axel Jantsch (IEEE Embed. Syst. Lett., 2011)

Cooperative communication based barrier synchronization in on-chip mesh architectures. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Hai Liu (IEICE Electron. Express, 2011)

Hybrid Distributed Shared Memory Space in Multi-core Processors. - Xiaowen Chen; Shuming Chen; Zhonghai Lu; Axel Jantsch (J. Softw., 2011)

System design of full HD MVC decoding on mesh-based multicore NoCs. - Ning Ma; Zhonghai Lu; Li-Rong Zheng 001 (Microprocess. Microsystems, 2011)

Analytical approaches for performance evaluation of networks-on-chip. - Abbas Eslami Kiasari; Axel Jantsch; Marco Bekooij; Alan Burns 001; Zhonghai Lu (CASES, 2012)

Worst-case performance analysis of 2-D mesh NoCs using multi-path minimal routing. - Gaoming Du; Cunqiang Zhang; Zhonghai Lu; Alberto Saggio; Minglun Gao (CODES+ISSS, 2012)

Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling. - Fahimeh Jafari; Axel Jantsch; Zhonghai Lu (DATE, 2012)

Parallel probing: Dynamic and constant time setup procedure in circuit switching NoC. - Shaoteng Liu; Axel Jantsch; Zhonghai Lu (DATE, 2012)

Architecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems. - Abdul Naeem; Axel Jantsch; Zhonghai Lu (DSD, 2012)

Scalability analysis of release and sequential consistency models in NoC based multicore systems. - Abdul Naeem; Axel Jantsch; Zhonghai Lu (ISSoC, 2012)

System-level evaluation of sensor networks deployment strategies: Coverage, lifetime and cost. - Huimin She; Zhonghai Lu; Axel Jantsch (IWCMC, 2012)

Dynamic Flow Regulation for IP Integration on Network-on-Chip. - Zhonghai Lu; Yi Wang (NOCS, 2012)

Modeling and Power Evaluation of On-Chip Router Components in Spintronics. - Pierre Schamberger; Zhonghai Lu; Xianyang Jiang; Meikang Qiu (NOCS, 2012)

An Enhanced IOT Gateway in a Broadcast System. - Xianyang Jiang; Deshi Li; Shaobo Nie; Jing Luo; Zhonghai Lu (UIC/ATC, 2012)

A single-cycle output buffered router with layered switching for Networks-on-Chips. - Yancang Chen; Zhonghai Lu; Lunguo Xie; Jinwen Li; Minxuan Zhang (Comput. Electr. Eng., 2012)

Self-selection pseudo- circuit: a clever crossbar pre-allocation. - Wenmin Hu; Hengzhu Liu; Zhonghai Lu; Axel Jantsch; Guitao Fu (IEICE Electron. Express, 2012)

A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Minxuan Zhang (IEICE Trans. Inf. Syst., 2012)

Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Minxuan Zhang; Xianju Yang (IEICE Trans. Inf. Syst., 2012)

Design and Optimization of a CDMA-Based Multi-Reader Passive UHF RFID System for Dense Scenarios. - Zhi Zhang; Zhonghai Lu; Qiang Chen 014; Xiaolang Yan (IEICE Trans. Commun., 2012)

Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks. - Huimin She; Zhonghai Lu; Axel Jantsch; Dian Zhou; Li-Rong Zheng 001 (Int. J. Distributed Sens. Networks, 2012)

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications. - Ming Liu 011; Zhonghai Lu; Wolfgang Kuehn; Axel Jantsch (Int. J. Embed. Real Time Commun. Syst., 2012)

TPSS: A Flexible Hardware Support for Unicast and Multicast on Network-on-Chip. - Wenmin Hu; Zhonghai Lu; Hengzhu Liu; Axel Jantsch (J. Comput., 2012)

Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors. - Meikang Qiu; Zhong Ming 001; Jiayin Li; Shaobo Liu; Bin Wang 002; Zhonghai Lu (J. Syst. Archit., 2012)

Analysis and Evaluation of Circuit Switched NoC and Packet Switched NoC. - Shaoteng Liu; Axel Jantsch; Zhonghai Lu (DSD, 2013)

Efficient distributed memory management in a multi-core H.264 decoder on FPGA. - Jiajie Zhang; Zheng Yu 001; Zhiyi Yu; Kexin Zhang; Zhonghai Lu; Axel Jantsch (ISSoC, 2013)

Per-flow delay bound analysis based on a formalized microarchitectural model. - Xueqian Zhao; Zhonghai Lu (NOCS, 2013)

Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Shenggang Chen; Huitao Gu (Comput. Electr. Eng., 2013)

Mathematical formalisms for performance evaluation of networks-on-chip. - Abbas Eslami Kiasari; Axel Jantsch; Zhonghai Lu (ACM Comput. Surv., 2013)

Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis. - Zhi Zhang; Zhonghai Lu; Qiang Chen 014; Xiaolang Yan; Li-Rong Zheng 001 (Int. J. Commun. Syst., 2013)

Scalability Analysis of Memory Consistency Models in NoC-Based Distributed Shared Memory SoCs. - Abdul Naeem; Axel Jantsch; Zhonghai Lu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Minxuan Zhang; Zuocheng Xing (IEEE Trans. Very Large Scale Integr. Syst., 2013)

An Analytical Latency Model for Networks-on-Chip. - Abbas Eslami Kiasari; Zhonghai Lu; Axel Jantsch (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Customizable coarse-grained energy-efficient reconfigurable packet processing architecture. - Mohammad Badawi; Ahmed Hemani; Zhonghai Lu (ASAP, 2014)

Fuzzy flow regulation for Network-on-Chip based chip multiprocessors systems. - Yuan Yao 009; Zhonghai Lu (ASP-DAC, 2014)

Parallel probe based dynamic connection setup in TDM NoCs. - Shaoteng Liu; Axel Jantsch; Zhonghai Lu (DATE, 2014)

Analysis and evaluation of per-flow delay bound for multiplexing models. - Yanchen Long; Zhonghai Lu; Xiaolang Yan (DATE, 2014)

Empowering study of delay bound tightness with simulated annealing. - Xueqian Zhao; Zhonghai Lu (DATE, 2014)

Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips. - Yuang Zhang; Li Li 003; Zhonghai Lu; Axel Jantsch; Yuxiang Fu; Minglun Gao (ISCAS, 2014)

An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs. - Gaoming Du; Miao Li; Zhonghai Lu; Minglun Gao; Chunhua Wang (NOCS, 2014)

Towards stochastic delay bound analysis for Network-on-Chip. - Zhonghai Lu; Yuan Yao 009; Yuming Jiang 001 (NOCS, 2014)

A hierarchical reconfigurable micro-coded multi-core processor for IoT applications. - Ning Ma; Zhuo Zou; Zhonghai Lu; Li-Rong Zheng 001; Stefan Blixt (ReCoSoC, 2014)

Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Yang Guo 003; Hengzhu Liu (IEICE Electron. Express, 2014)

A survey of memory architecture for 3D chip multi-processors. - Yuang Zhang; Li Li 003; Zhonghai Lu; Axel Jantsch; Minglun Gao; Hongbing Pan; Feng Han 008 (Microprocess. Microsystems, 2014)

Item-Level Indoor Localization With Passive UHF RFID Based on Tag Interaction Analysis. - Zhi Zhang; Zhonghai Lu; Vardan Saakian; Xing Qin; Qiang Chen 014; Li-Rong Zheng 001 (IEEE Trans. Ind. Electron., 2014)

A Fair and Maximal Allocator for Single-Cycle On-Chip Homogeneous Resource Allocation. - Shaoteng Liu; Axel Jantsch; Zhonghai Lu (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Performance analysis of on-chip bufferless router with multi-ejection ports. - Chaochao Feng; Zhuofan Liao; Zhonghai Lu; Axel Jantsch; Zhenyu Zhao (ASICON, 2015)

Exploring stacked main memory architecture for 3D GPGPUs. - Yuang Zhang; Li Li 003; Axel Jantsch; Zhonghai Lu; Minglun Gao; Yuxiang Fu; Hongbing Pan (ASICON, 2015)

Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs. - Xiaowen Chen; Zhonghai Lu; Yang Li; Axel Jantsch; Xueqian Zhao; Shuming Chen; Yang Guo 003; Zonglin Liu; Jianzhuang Lu; Jianghua Wan; Shuwei Sun; Shenggang Chen; et al. (ISVLSI, 2015)

Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls. - Alberto Saggio; Gaoming Du; Xueqian Zhao; Zhonghai Lu (ISVLSI, 2015)

Backlog Bound Analysis for Virtual-Channel Routers. - Xueqian Zhao; Zhonghai Lu (ISVLSI, 2015)

Highway in TDM NoCs. - Shaoteng Liu; Zhonghai Lu; Axel Jantsch (NOCS, 2015)

Implementing MVC Decoding on Homogeneous NoCs: Circuit Switching or Wormhole Switching. - Ning Ma; Zhuo Zou; Zhonghai Lu; Li-Rong Zheng 001 (PDP, 2015)

Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Yang Guo 003; Shenggang Chen; Hu Chen (J. Electr. Comput. Eng., 2015)

MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels. - Shaoteng Liu; Axel Jantsch; Zhonghai Lu (J. Syst. Archit., 2015)

Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips. - Xiaowen Chen; Zhonghai Lu; Axel Jantsch; Shuming Chen; Yang Guo 003; Shenggang Chen; Hu Chen; Man Liao (J. Softw., 2015)

Heuristics-Aided Tightness Evaluation of Analytical Bounds in Networks-on-Chip. - Xueqian Zhao; Zhonghai Lu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels. - Fahimeh Jafari; Zhonghai Lu; Axel Jantsch (ACM Trans. Design Autom. Electr. Syst., 2015)

OLITS: An Ohm's Law-like traffic splitting model based on congestion prediction. - Gaoming Du; Yanghao Ou; Xiangyang Li; Ping Song; Zhonghai Lu; Minglun Gao (DATE, 2016)

Memory-access aware DVFS for network-on-chip in CMPs. - Yuan Yao 009; Zhonghai Lu (DATE, 2016)

Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture. - Mohammad Badawi; Zhonghai Lu; Ahmed Hemani (DSD, 2016)

Real-Time Analysis for Wormhole NoC: Revisited and Revised. - Qin Xiong; Zhonghai Lu; Fei Wu 005; Changsheng Xie (ACM Great Lakes Symposium on VLSI, 2016)

DVFS for NoCs in CMPs: A thread voting approach. - Yuan Yao 009; Zhonghai Lu (HPCA, 2016)

Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs. - Yuan Yao 009; Zhonghai Lu (ISCA, 2016)

A 101.4 GOPS/W reconfigurable and scalable control-centric embedded processor for domain-specific applications. - Ning Ma; Zhuo Zou; Zhonghai Lu; Li-Rong Zheng 001; Yuxiang Huan; Stefan Blixt (ISCAS, 2016)

Multi-bit transient fault control for NoC links using 2D fault coding method. - Xiaowen Chen; Zhonghai Lu; Yuanwu Lei; Yaohua Wang; Shenggang Chen (NOCS, 2016)

Service-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture. - Mohammad Badawi; Zhonghai Lu; Ahmed Hemani (PDP, 2016)

Design and implementation of multi-mode routers for large-scale inter-core networks. - Ning Ma; Zhuo Zou; Zhonghai Lu; Li-Rong Zheng 001 (Integr., 2016)

Aggregate Flow-Based Performance Fairness in CMPs. - Zhonghai Lu; Yuan Yao 009 (ACM Trans. Archit. Code Optim., 2016)

A 101.4 GOPS/W Reconfigurable and Scalable Control-Centric Embedded Processor for Domain-Specific Applications. - Yuxiang Huan; Ning Ma; Jia Mao; Stefan Blixt; Zhonghai Lu; Zhuo Zou; Li-Rong Zheng 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Weighted Round Robin Configuration for Worst-Case Delay Optimization in Network-on-Chip. - Fahimeh Jafari; Axel Jantsch; Zhonghai Lu (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A New CDMA Encoding/Decoding Method for on-Chip Communication Network. - Jian Wang 024; Zhonghai Lu; Yubai Li (IEEE Trans. Very Large Scale Integr. Syst., 2016)

SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress). - Gaoming Du; Shibi Ma; Zhenmin Li; Zhonghai Lu; Yiming Ouyang; Minglun Gao (CASES, 2017)

Prediction based convolution neural network acceleration: work-in-progress. - Yuan Yao 009; Zhonghai Lu (CASES, 2017)

Lifetime adaptive ECC in NAND flash page management. - Shunzhuo Wang; Fei Wu 005; Zhonghai Lu; You Zhou 009; Qin Xiong; Meng Zhang 014; Changsheng Xie (DATE, 2017)

A Methodological Framework for Model-Based Self-management of Services and Components in Dependable Cyber-Physical Systems. - De-Jiu Chen; Zhonghai Lu (DepCoS-RELCOMEX, 2017)

A Model-Based Approach to Dynamic Self-assessment for Automated Performance and Safety Awareness of Cyber-Physical Systems. - De-Jiu Chen; Zhonghai Lu (IMBSA, 2017)

ALARM: A Location-Aware Redistribution Method to Improve 3D FG NAND Flash Reliability. - Yue Zhu; Fei Wu 005; Qin Xiong; Zhonghai Lu; Changsheng Xie (NAS, 2017)

Characterizing 3D Floating Gate NAND Flash. - Qin Xiong; Fei Wu 005; Zhonghai Lu; Yue Zhu; You Zhou 009; Yibing Chu; Changsheng Xie; Ping Huang 001 (SIGMETRICS (Abstracts), 2017)

Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture. - Mohammad Badawi; Zhonghai Lu; Ahmed Hemani (Microprocess. Microsystems, 2017)

Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS. - Zhonghai Lu; Yuan Yao 009 (IEEE Trans. Computers, 2017)

Extending Real-Time Analysis for Wormhole NoCs. - Qin Xiong; Fei Wu 005; Zhonghai Lu; Changsheng Xie (IEEE Trans. Computers, 2017)

Round-trip DRAM Access Fairness in 3D NoC-based Many-core Systems. - Xiaowen Chen; Zhonghai Lu; Sheng Liu 001; Shuming Chen (ACM Trans. Embed. Comput. Syst., 2017)

A Tool for xMAS-Based Modeling and Analysis of Communication Fabrics in Simulink. - Xueqian Zhao; Zhonghai Lu (ACM Trans. Model. Comput. Simul., 2017)

Dynamic Traffic Regulation in NoC-Based Systems. - Zhonghai Lu; Yuan Yao 009 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Program error rate-based wear leveling for NAND flash memory. - Xin Shi; Fei Wu 005; Shunzhuo Wang; Changsheng Xie; Zhonghai Lu (DATE, 2018)

iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores. - Yuan Yao 009; Zhonghai Lu (HPCA, 2018)

Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications. - Fei Wu 005; Yue Zhu; Qin Xiong; Zhonghai Lu; You Zhou 009; Weizhen Kong; Changsheng Xie (ICCD, 2018)

Towards QoS-Aware Service-Oriented Communication in E/E Automotive Architectures. - Matthias Becker 004; Zhonghai Lu; De-Jiu Chen (IECON, 2018)

Exploiting Minipage-Level Mapping to Improve Write Efficiency of NAND Flash. - Hao Lv; You Zhou 009; Fei Wu 005; Weijun Xiao; Xubin He; Zhonghai Lu; Changsheng Xie (NAS, 2018)

Cache Access Fairness in 3D Mesh-Based NUCA. - Zicong Wang; Xiaowen Chen; Zhonghai Lu; Yang Guo 003 (IEEE Access, 2018)

Thread Voting DVFS for Manycore NoCs. - Zhonghai Lu; Yuan Yao 009 (IEEE Trans. Computers, 2018)

Composable Worst-Case Delay Bound Analysis Using Network Calculus. - Yanchen Long; Zhonghai Lu; Haibin Shen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

xMAS-Based QoS Analysis Methodology. - Zhonghai Lu; Xueqian Zhao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

WARD: Wear Aware RAID Design Within SSDs. - Shunzhuo Wang; Fei Wu 005; Zhonghai Lu; Jiaona Zhou; Changsheng Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A New Parallel CODEC Technique for CDMA NoCs. - Jian Wang 024; Shize Guo; Zhe Chen; Yubai Li; Zhonghai Lu (IEEE Trans. Ind. Electron., 2018)

Characterizing 3D Floating Gate NAND Flash: Observations, Analyses, and Implications. - Qin Xiong; Fei Wu 005; Zhonghai Lu; Yue Zhu; You Zhou 009; Yibing Chu; Changsheng Xie; Ping Huang 001 (ACM Trans. Storage, 2018)

RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router. - Cunlu Li; Dezun Dong; Zhonghai Lu; Xiangke Liao (IEEE Trans. Parallel Distributed Syst., 2018)

A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition. - Xiaowen Chen; Yuanwu Lei; Zhonghai Lu; Shuming Chen (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Competence Networks in the Era of CPS - Lessons Learnt in the ICES Cross-Disciplinary and Multi-domain Center. - Martin Törngren; Fredrik Asplund; Tor Ericson; Catrin Granbom; Erik Herzog; Zhonghai Lu; Mats Magnusson; Maria Månsson; Stefan Norrwing; Johanna Olsson; Johnny Öberg (CyPhy/WESE, 2019)

ANN Based Admission Control for On-Chip Networks. - Boqian Wang; Zhonghai Lu; Shenggang Chen (DAC, 2019)

Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash. - Weihua Liu; Fei Wu 005; Meng Zhang 014; Yifei Wang; Zhonghai Lu; Xiangfeng Lu; Changsheng Xie (DATE, 2019)

Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization. - Shenggang Chen; Zhonghai Lu (ICCD, 2019)

NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator. - Gaoming Du; Zhenwen Yang; Zhenmin Li; Duoli Zhang; Yongsheng Yin; Zhonghai Lu (ICCD, 2019)

An Adaptive Resource Provisioning Scheme for Industrial SDN Networks. - Matthias Becker 004; Zhonghai Lu; De-Jiu Chen (INDIN, 2019)

Smilodon: An Efficient Accelerator for Low Bit-Width CNNs with Task Partitioning. - Qinyu Chen; Yuxiang Fu; Kaifeng Cheng; Wenqing Song; Zhonghai Lu; Li Li 003; Chuan Zhang 001 (ISCAS, 2019)

Congestion-Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs. - Yuxiang Fu; Qinyu Chen; Guoqiang He; Kai Chen; Zhonghai Lu; Chuan Zhang 001; Li Li 003 (ISCAS, 2019)

RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory. - Ruixiang Ma; Fei Wu 005; Meng Zhang 014; Zhonghai Lu; Jiguang Wan 001; Changsheng Xie (IEEE Access, 2019)

Toward FPGA Security in IoT: A New Detection Technique for Hardware Trojans. - Zhe Chen; Shize Guo; Jian Wang 024; Yubai Li; Zhonghai Lu (IEEE Internet Things J., 2019)

SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method. - Gaoming Du; Guanyu Liu; Zhenmin Li; Yifan Cao; Duoli Zhang; Yiming Ouyang; Minglun Gao; Zhonghai Lu (ACM J. Emerg. Technol. Comput. Syst., 2019)

SCORE: A Novel Scheme to Efficiently Cache Overlong ECCs in NAND Flash Memory. - You Zhou 009; Fei Wu 005; Zhonghai Lu; Xubin He; Ping Huang 001; Changsheng Xie (ACM Trans. Archit. Code Optim., 2019)

Bit-Flipping Schemes Upon MLC Flash: Investigation, Implementation, and Evaluation. - Wenhui Zhang 005; Qiang Cao 001; Zhonghai Lu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Security-Aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs. - Shize Guo; Jian Wang 024; Zhe Chen; Zhonghai Lu; Jinhong Guo; Lian Yang (IEEE Trans. Ind. Informatics, 2019)

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions. - Hui Chen 015; Lin Jiang; Yuanyong Luo; Zhonghai Lu; Yuxiang Fu; Li Li 003; Zongguang Yu (ISCAS, 2020)

Supporting QoS in AXI4 Based Communication Architecture. - Boqian Wang; Zhonghai Lu (ISVLSI, 2020)

A Universal Approximation Method and Optimized Hardware Architectures for Arithmetic Functions Based on Stochastic Computing. - Zidi Qin; Yuou Qiu; Muhan Zheng; Hongxi Dong; Zhonghai Lu; Zhongfeng Wang 001; Hongbing Pan (IEEE Access, 2020)

Efficient Support of AXI4 Transaction Ordering Requirements in Many-Core Architecture. - Boqian Wang; Zhonghai Lu (IEEE Access, 2020)

Securing IoT Space via Hardware Trojan Detection. - Shize Guo; Jian Wang 024; Zhe Chen; Yubai Li; Zhonghai Lu (IEEE Internet Things J., 2020)

Advance Virtual Channel Reservation. - Boqian Wang; Zhonghai Lu (IEEE Trans. Computers, 2020)

Pursuing Extreme Power Efficiency With PPCC Guided NoC DVFS. - Yuan Yao 009; Zhonghai Lu (IEEE Trans. Computers, 2020)

BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction. - Ruixiang Ma; Fei Wu 005; Zhonghai Lu; Wenmin Zhong; Qiulin Wu; Jiguang Wan 001; Changsheng Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation. - Hui Chen 015; Kaifeng Cheng; Zhonghai Lu; Yuxiang Fu; Li Li 003 (IEEE Trans. Circuits Syst., 2020)

A Novel Approximation Methodology and Its Efficient VLSI Implementation for the Sigmoid Function. - Zidi Qin; Yuou Qiu; Huaqing Sun; Zhonghai Lu; Zhongfeng Wang 001; Qinghong Shen; Hongbing Pan (IEEE Trans. Circuits Syst., 2020)

An Efficient Accelerator for Multiple Convolutions From the Sparsity Perspective. - Qinyu Chen; Yan Huang; Rui Sun; Wenqing Song; Zhonghai Lu; Yuxiang Fu; Li Li 003 (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory. - Weihua Liu; Fei Wu 005; Jian Zhou 004; Meng Zhang 014; Chengmo Yang; Zhonghai Lu; Yu Wang 168; Changsheng Xie (DATE, 2021)

The Impact of Faults on DNNs: A Case Study. - Elaheh Malekzadeh; Nezam Rohbani; Zhonghai Lu; Masoumeh Ebrahimi (DFT, 2021)

Evaluation of Time Series Clustering on Embedded Sensor Platform. - Wenyao Zhu; Zhonghai Lu (DSD, 2021)

A General Methodology and Architecture for Arbitrary Complex Number Nth Root Computation. - Hui Chen 015; Ruiqi Wu; Zhonghai Lu; Yuxiang Fu; Li Li 003; Zongguang Yu (ISCAS, 2021)

Dynamic and Traffic-Aware Medium Access Control Mechanisms for Wireless NoC Architectures. - Qian Gao; Wenqing Song; Zhonghai Lu; Li Li 003; Yuxiang Fu (ISCAS, 2021)

A Configurable Hardware Architecture for Runtime Application of Network Calculus. - Xiao Hu; Zhonghai Lu (Int. J. Parallel Program., 2021)

Guest Editorial: IEEE TC Special Issue On Communications for Many-core Processors and Accelerators. - Zhonghai Lu (IEEE Trans. Computers, 2021)

DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD. - Weihua Liu; Fei Wu 005; Meng Zhang 014; Chengmo Yang; Zhonghai Lu; Jiguang Wan 001; Changsheng Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions. - Hui Chen 015; Heping Yang; Wenqing Song; Zhonghai Lu; Yuxiang Fu; Li Li 003; Zongguang Yu (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers. - Hui Chen 015; Zongguang Yu; Yonggang Zhang 005; Zhonghai Lu; Yuxiang Fu; Li Li 003 (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Optimal Sprinting Pattern in Thermal Constrained CMPs. - Jian Wang 024; Zhe Chen; Shize Guo; Yubai Li; Zhonghai Lu (IEEE Trans. Emerg. Top. Comput., 2021)

Enabling Energy-Efficient Inference for Self-Attention Mechanisms in Neural Networks. - Qinyu Chen; Congyi Sun; Zhonghai Lu; Chang Gao 002 (AICAS, 2022)

Wearable pressure sensing for lower limb amputees. - Zhonghai Lu; Wenyao Zhu; Yizhi Chen; Josephine Charnley; Valter Dejke; Andrii Pomazanskyi; Siu-Teing Ko; Begum Zeybek; Pouyan Mehryar; Zulfiqur Ali; Michalis Karamousadakis; De-Jiu Chen (BioCAS, 2022)

Inference Time Reduction of Deep Neural Networks on Embedded Devices: A Case Study. - Isma-Ilou Sadou; Seyed Morteza Nabavinejad; Zhonghai Lu; Masoumeh Ebrahimi (DSD, 2022)

A Hierarchical Parallel Discrete Gaussian Sampler for Lattice-Based Cryptography. - Sirui Shen; Wenqing Song; Xinyu Wang; Xinyu Shao; Yuxiang Fu; Zhonghai Lu; Li Li 003 (ISCAS, 2022)

Accelerating Non-Negative Matrix Factorization on Embedded FPGA with Hybrid Logarithmic Dot-Product Approximation. - Yizhi Chen; Yarib Nevarez; Zhonghai Lu; Alberto García-Ortiz (MCSoC, 2022)

Online Image Sensor Fault Detection for Autonomous Vehicles. - Yizhi Chen; Wenyao Zhu; De-Jiu Chen; Zhonghai Lu (MCSoC, 2022)

Redundancy Reduction for Sensor Deployment in Prosthetic Socket: A Case Study. - Wenyao Zhu; Yizhi Chen; Siu-Teing Ko; Zhonghai Lu (Sensors, 2022)

A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash. - Lanlan Cui; Xiaojian Liu; Fei Wu 005; Zhonghai Lu; Changsheng Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture. - Boqian Wang; Zhonghai Lu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Huicore: A Generalized Hardware Accelerator for Complicated Functions. - Hui Chen 015; Zongguang Yu; Jin Xu; Lin Jiang; Zhonghai Lu; Yuxiang Fu; Li Li 003 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Base-2 Softmax Function: Suitability for Training and Efficient Hardware Implementation. - Yuan Zhang; Yonggang Zhang 005; Lele Peng; Lianghua Quan; Shubin Zheng; Zhonghai Lu; Hui Chen 015 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

FlexZNS: Building High-Performance ZNS SSDs with Size-Flexible and Parity-Protected Zones. - Yu Wang 168; You Zhou 009; Zhonghai Lu; Xiaoyi Zhang; Kun Wang 029; Feng Zhu 024; Shu Li; Changsheng Xie; Fei Wu 005 (ICCD, 2023)

Age Feature Enhanced Neural Network for RUL Estimation of Power Electronic Devices. - Zhonghai Lu; Rui Shi; Chao Guo; Mingrui Liu (ICPHM, 2023)

Combining Self-Organizing Map with Reinforcement Learning for Multivariate Time Series Anomaly Detection. - Peng Su; Zhonghai Lu; De-Jiu Chen (SMC, 2023)

Health warning based on 3R ECG Sample's combined features and LSTM. - Qingshan Liu; Cuiyun Gao; Yang Zhao; Songqun Huang; Yuqing Zhang; Xiaoyu Dong; Zhonghai Lu (Comput. Biol. Medicine, 2023)

Holistic and Opportunistic Scheduling of Background I/Os in Flash-Based SSDs. - Yu Wang 168; You Zhou 009; Fei Wu 005; Yu Zhong; Jian Zhou 004; Zhonghai Lu; Shu Li; Zhengyong Wang; Changsheng Xie (IEEE Trans. Computers, 2023)

PiN: Processing in Network-on-Chip. - Zhonghai Lu (IEEE Des. Test, 2023)

A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow. - Lingxiao Zhu; Wenjie Fan 004; Chenyang Dai; Shize Zhou; Yongqi Xue; Zhonghai Lu; Li Li 003; Yuxiang Fu (IEEE Des. Test, 2023)

Impact of Image Sensor Input Faults on Pruned Neural Networks for Object Detection. - Yizhi Chen; Wenyao Zhu; De-Jiu Chen; Omar Mohammed; Parthib Khound; Zhonghai Lu (DFT, 2024)

Travel Time-Based Task Mapping for NoC-Based DNN Accelerator. - Yizhi Chen; Wenyao Zhu; Zhonghai Lu (SAMOS, 2024)

Pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator. - Wenyao Zhu; Yizhi Chen; Zhonghai Lu (SAMOS, 2024)

MCLB: Dynamic Load Balancing and Implications on GPU Memory Controllers. - Vahid Geraeinejad; Kun-Chih Jimmy Chen; Zhonghai Lu; Masoumeh Ebrahimi (SOCC, 2024)

Heterogeneous Reconfigurable Accelerator for Homomorphic Evaluation on Encrypted Data. - Wenqing Song; Sirui Shen; Congwei Xu; Yilin Wang; Xinyu Wang; Yuxiang Fu; Li Li 003; Zhonghai Lu (IEEE Access, 2024)

Amputee Gait Phase Recognition Using Multiple GMM-HMM. - Wenyao Zhu; Zhenbang Liu; Yizhi Chen; De-Jiu Chen; Zhonghai Lu (IEEE Access, 2024)

Communication Synchronization-Aware Arbitration Policy in NoC-Based DNN Accelerators. - Wenjie Fan 004; Siyue Li; Lingxiao Zhu; Zhonghai Lu; Li Li 003; Yuxiang Fu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Automatic Generation and Optimization Framework of NoC-Based Neural Network Accelerator Through Reinforcement Learning. - Yongqi Xue; Jinlun Ji; Xinming Yu; Shize Zhou; Siyue Li; Xinyi Li; Tong Cheng; Shiping Li; Kai Chen; Zhonghai Lu; Li Li 003; Yuxiang Fu (IEEE Trans. Computers, 2024)