HME: A lightweight emulator for hybrid memory. - Zhuohui Duan; Haikun Liu; Xiaofei Liao; Hai Jin 001 (DATE, 2018)

HiNUMA: NUMA-Aware Data Placement and Migration in Hybrid Memory Systems. - Zhuohui Duan; Haikun Liu; Xiaofei Liao; Hai Jin 001; Wenbin Jiang 001; Yu Zhang 027 (ICCD, 2019)

Gengar: An RDMA-based Distributed Hybrid Memory Pool. - Zhuohui Duan; Haikun Liu; Haodi Lu; Xiaofei Liao; Hai Jin 001; Yu Zhang 027; Bingsheng He (ICDCS, 2021)

Hardware-supported remote persistence for distributed persistent memory. - Zhuohui Duan; Haodi Lu; Haikun Liu; Xiaofei Liao; Hai Jin 001; Yu Zhang 027; Song Wu 001 (SC, 2021)

CLIMBER: defending phase change memory against inconsistent write attacks. - Zhuohui Duan; Haobo Wang; Haikun Liu; Xiaofei Liao; Hai Jin 001; Yu Zhang 027; Fubing Mao (DAC, 2022)

ReSMA: accelerating approximate string matching using ReRAM-based content addressable memory. - Huize Li; Hai Jin 001; Long Zheng 003; Yu Huang 013; Xiaofei Liao; Zhuohui Duan; Dan Chen 006; Chuangyi Gui (DAC, 2022)

ReGNN: a ReRAM-based heterogeneous architecture for general graph neural networks. - Cong Liu 028; Haikun Liu; Hai Jin 001; Xiaofei Liao; Yu Zhang 027; Zhuohui Duan; Jiahong Xu; Huize Li (DAC, 2022)

Revisiting Log-Structured Merging for KV Stores in Hybrid Memory Systems. - Zhuohui Duan; Jiabo Yao; Haikun Liu; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (ASPLOS (2), 2023)

A Compilation Tool for Computation Offloading in ReRAM-based CIM Architectures. - Hai Jin 001; Bo Lei; Haikun Liu; Xiaofei Liao; Zhuohui Duan; Chencheng Ye 001; Yu Zhang 027 (ACM Trans. Archit. Code Optim., 2023)

TIGA: Towards Efficient Near Data Processing in SmartNICs-based Disaggregated Memory Systems. - Zhuohui Duan; Zelin Yu; Haikun Liu; Xiaofei Liao; Hai Jin 001; Shijie Zheng; Sihan Wu (DAC, 2024)

Fast Parallel Recovery for Transactional Stream Processing on Multicores. - Jianjun Zhao 003; Haikun Liu; Shuhao Zhang 001; Zhuohui Duan; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (ICDE, 2024)

Scalable Billion-point Approximate Nearest Neighbor Search Using SmartSSDs. - Bing Tian; Haikun Liu; Zhuohui Duan; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (USENIX ATC, 2024)

FusionANNS: An Efficient CPU/GPU Cooperative Processing Architecture for Billion-scale Approximate Nearest Neighbor Search. - Bing Tian; Haikun Liu; Yuhang Tang; Shihai Xiao; Zhuohui Duan; Xiaofei Liao; Xuecang Zhang; Junhua Zhu; Yu Zhang 027 (CoRR, 2024)

CPSAA: Accelerating Sparse Attention Using Crossbar-Based Processing-In-Memory Architecture. - Huize Li; Hai Jin 001; Long Zheng 003; Xiaofei Liao; Yu Huang 013; Cong Liu 028; Jiahong Xu; Zhuohui Duan; Dan Chen 006; Chuangyi Gui (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators. - Jiahong Xu; Haikun Liu; Zhuohui Duan; Xiaofei Liao; Hai Jin 001; Xiaokang Yang 004; Huize Li; Cong Liu 028; Fubing Mao; Yu Zhang 027 (ACM Trans. Archit. Code Optim., 2024)

AegonKV: A High Bandwidth, Low Tail Latency, and Low Storage Cost KV-Separated LSM Store with SmartSSD-based GC Offloading. - Zhuohui Duan; Hao Feng; Haikun Liu; Xiaofei Liao; Hai Jin 001; Bangyu Li (FAST, 2025)

Towards High-throughput and Low-latency Billion-scale Vector Search via CPU/GPU Collaborative Filtering and Re-ranking. - Bing Tian; Haikun Liu; Yuhang Tang; Shihai Xiao; Zhuohui Duan; Xiaofei Liao; Hai Jin 001; Xuecang Zhang; Junhua Zhu; Yu Zhang 027 (FAST, 2025)

Towards High-Performance Transactional Stateful Serverless Workflows with Affinity-Aware Leasing. - Jianjun Zhao 003; Haikun Liu; Shuhao Zhang 001; Haodi Lu; Yancan Mao; Zhuohui Duan; Xiaofei Liao; Hai Jin 001 (USENIX ATC, 2025)

Fast Distributed Transactions for RDMA-based Disaggregated Memory. - Haodi Lu; Haikun Liu; Yujian Zhang; Zhuohui Duan; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (USENIX ATC, 2025)

A ReRAM-Based Processing-In-Memory Architecture for Hyperdimensional Computing. - Cong Liu 028; Kaibo Wu; Haikun Liu; Hai Jin 001; Xiaofei Liao; Zhuohui Duan; Jiahong Xu; Huize Li; Yu Zhang 027; Jing Yang 051 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)