A 40-nm 202.3nJ/Classification Neuromorphic Architecture Employing In-SRAM Charge-Domain Compute. - Chang Liu; Zihao Xuan; Yi Kang (ASICON, 2021)

HPSW-CIM: A Novel ReRAM-Based Computing-in-Memory Architecture with Constant-Term Circuit for Full Parallel Hybrid-Precision-Signed-Weight MAC Operation. - Zihao Xuan; Yue Zhang; Yuan Li; Chang Liu; Yi Kang (ISCAS, 2022)

High-Efficiency Data Conversion Interface for Reconfigurable Function-in-Memory Computing. - Zihao Xuan; Yi Kang (IEEE Trans. Very Large Scale Integr. Syst., 2022)

A 28nm 15.09nJ/inference Neuromorphic Processor with SRAM-Based Charge Domain in-Memory-Computing. - Yuchao Zhang; Zihao Xuan; Yi Kang (ASICON, 2023)

An 1.38nJ/Inference Clock-Free Mixed-Signal Neuromorphic Architecture Using ReL-PSP Function and Computing-in-Memory. - Wenbing Fang; Zihao Xuan; Song Chen 001; Yi Kang (BioCAS, 2023)

AiDAC: A Low-Cost In-Memory Computing Architecture with All-Analog Multi-Bit Compute and Interconnect. - Zihao Xuan; Song Chen 001; Yi Kang (CoRR, 2023)

A Brain-Inspired ADC-Free SRAM-Based In-Memory Computing Macro With High-Precision MAC for AI Application. - Zihao Xuan; Chang Liu; Yue Zhang; Yuan Li; Yi Kang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

TQ-TTFS: High-Accuracy and Energy-Efficient Spiking Neural Networks Using Temporal Quantization Time-to-First-Spike Neuron. - Yuxuan Yang; Zihao Xuan; Yi Kang (ASPDAC, 2024)

A dynamic decoder with speculative termination for low latency inference in spiking neural networks. - Yuxuan Yang; Zihao Xuan; Song Chen; Yi Kang (Neurocomputing, 2025)

A neuromorphic hardware architecture based on TTFS coding with temporal quantization for spiking neural networks. - Yuxuan Yang; Qihu Xie; Zihao Xuan; Song Chen 001; Yi Kang (Integr., 2025)

HNM-CIM: An Algorithm-Hardware Co-designed SRAM-based CIM for Transformer Acceleration Exploiting Hybrid N:M Sparsity. - Yuang Ma; Yulong Meng; Zihao Xuan; Song Chen 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2025)