Homogeneous and Heterogeneous Feed-Forward XOR Physical Unclonable Functions. - S. V. Sandeep Avvaru; Ziqing Zeng; Keshab K. Parhi (IEEE Trans. Inf. Forensics Secur., 2020)

VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis. - Hadi Esmaeilzadeh; Soroush Ghodrati; Jie Gu 003; Shiyu Guo; Andrew B. Kahng; Joon Kyung Kim; Sean Kinzer; Rohan Mahapatra; Susmita Dey Manasi; Edwin Mascarenhas; Sachin S. Sapatnekar; Ravi Varadarajan; et al. (ICCAD, 2021)

Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms. - Hadi Esmaeilzadeh; Soroush Ghodrati; Andrew B. Kahng; Joon Kyung Kim; Sean Kinzer; Sayak Kundu; Rohan Mahapatra; Susmita Dey Manasi; Sachin S. Sapatnekar; Zhiang Wang; Ziqing Zeng (MLCAD, 2022)

Energy-efficient Hardware Acceleration of Shallow Machine Learning Applications. - Ziqing Zeng; Sachin S. Sapatnekar (DATE, 2023)

A Multicore GNN Training Accelerator. - Sudipta Mondal; Ramprasath S 001; Ziqing Zeng; Kishor Kunal; Sachin S. Sapatnekar (ISLPED, 2023)

3SAT on an All-to-All-Connected CMOS Ising Solver Chip. - M. Hüsrev Cilasun; Ziqing Zeng; Ramprasath S 001; Abhimanyu Kumar; Hao Lo; William Cho; Chris H. Kim; Ulya R. Karpuzcu; Sachin S. Sapatnekar (CoRR, 2023)

A Unified Engine for Accelerating GNN Weighting/Aggregation Operations, With Efficient Load Balancing and Graph-Specific Caching. - Sudipta Mondal; Susmita Dey Manasi; Kishor Kunal; Ramprasath S 001; Ziqing Zeng; Sachin S. Sapatnekar (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

On Heterogeneous Ising Machines. - Hüsrev Cilasun; Abhimanyu Kumar; Ziqing Zeng; Nafisa Sadaf Prova; Sachin S. Sapatnekar; Ulya R. Karpuzcu (CoRR, 2024)

An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators. - Hadi Esmaeilzadeh; Soroush Ghodrati; Andrew B. Kahng; Joon Kyung Kim; Sean Kinzer; Sayak Kundu; Rohan Mahapatra; Susmita Dey Manasi; Sachin S. Sapatnekar; Zhiang Wang; Ziqing Zeng (ACM Trans. Design Autom. Electr. Syst., 2024)

COBI: A Coupled Oscillator Based Ising Chip for Combinatorial Optimization. - Hüsrev Cilasun; William Moy; Ziqing Zeng; Tahmida Islam; Hao Lo; Alex Vanasse; Megan Tan; Mohammad Anees; Ramprasath S 001; Abhimanyu Kumar; Sachin S. Sapatnekar; Chris H. Kim; et al. (Zenodo, 2024)