Sequence Triggered Hardware Trojan in Neural Network Accelerator. - Zizhen Liu; Jing Ye 001; Xing Hu 001; Huawei Li 001; Xiaowei Li 001; Yu Hu 001 (VTS, 2020)

Efficient Secure Aggregation Based on SHPRG For Federated Learning. - Zizhen Liu; Si Chen; Jing Ye 001; Junfeng Fan; Huawei Li 001; Xiaowei Li 001 (CoRR, 2021)

SASH: Efficient secure aggregation based on SHPRG for federated learning. - Zizhen Liu; Si Chen; Jing Ye 001; Junfeng Fan; Huawei Li 001; Xiaowei Li 001 (UAI, 2022)

An Empirical Study of the Inherent Resistance of Knowledge Distillation Based Federated Learning to Targeted Poisoning Attacks. - Weiyang He; Zizhen Liu; Chip-Hong Chang (ATS, 2023)

DHSA: efficient doubly homomorphic secure aggregation for cross-silo federated learning. - Zizhen Liu; Si Chen; Jing Ye 001; Junfeng Fan; Huawei Li 001; Xiaowei Li 001 (J. Supercomput., 2023)

A Cooperative Deception Strategy for Covert Communication in Presence of a Multi-Antenna Adversary. - Jiangbo Si; Zizhen Liu; Zan Li 001; Hang Hu 001; Lei Guan; Chao Wang 028; Naofal Al-Dhahir (IEEE Trans. Commun., 2023)

Accelerating Sequential Circuit Simulation with Spatial Locality Enhancement and Redundant Event Reduction. - Jiaping Tang; Zizhen Liu; Jianan Mu; Feng Gu; Mingjun Wang; Wenxing Li; Jing Ye 001; Xiaowei Li 001; Huawei Li 001 (ATS, 2024)

Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption. - Jianan Mu; Husheng Han; Shangyi Shi; Jing Ye 001; Zizhen Liu; Shengwen Liang; Meng Li 004; Mingzhe Zhang; Song Bian 001; Xing Hu 001; Huawei Li 001; Xiaowei Li 001 (DAC, 2024)

DDP-Fsim: Efficient and Scalable Fault Simulation for Deterministic Patterns with Two-Dimensional Parallelism. - Feng Gu; Mingjun Wang; Jianan Mu; Zizhen Liu; Jiaping Tang; Hui Wang 152; Yonghao Wang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (ICCAD, 2024)

A Static Test Compaction Method Based on GCN Assisted Fault Gate Classification. - Zhiteng Chao; Qinluan Dai; Jiale Li; Zizhen Liu; Wenxing Li; Hongqin Lyu; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (ITC-Asia, 2024)

Efficient Functional Safety Method for Gate-Level Fine-Grained Digital Circuits with ISO-26262. - Mingjun Wang; Hui Wang 152; Jianan Mu; Zizhen Liu; Jun Gao; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (ITC-Asia, 2024)

SPFL: A Self-Purified Federated Learning Method Against Poisoning Attacks. - Zizhen Liu; Weiyang He; Chip-Hong Chang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Inf. Forensics Secur., 2024)

UAFer: A Unified Model for Class-Agnostic Binary Segmentation With Uncertainty-Aware Feature Reassembly. - Zihao Dong; Zizhen Liu; Runmin Cong; Tiyu Fang; Xiuli Shao; Sam Kwong (IEEE Trans. Circuits Syst. Video Technol., 2024)

ETPG: Efficient Transition Fault Simulation via Dual-Strategy Pattern Parallelism and Gate Restructuring. - Mingjun Wang; Hui Wang 152; Zizhen Liu; Feng Gu; Jianan Mu; Jiaping Tang; Jun Gao; Huawei Li 001; Jing Ye 001; Xiaowei Li 001 (ASP-DAC, 2025)

ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy. - Jiaping Tang; Jianan Mu; Silin Liu; Zizhen Liu; Feng Gu; Xinyu Zhang; Leyan Wang; Shengwen Liang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (DATE, 2025)

HighTPI: A Hierarchical Graph Based Intelligent Method for Test Point Insertion. - Zhiteng Chao; Bin Sun; Hongqin Lyu; Ge Yu; Minjun Wang; Wenxing Li; Zizhen Liu; Jianan Mu; Shengwen Liang; Jing Ye 001; Xiaowei Li 001; Huawei Li 001 (VTS, 2025)

A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow. - Zhiteng Chao; Xindi Zhang; Junying Huang; Zizhen Liu; Yixuan Zhao; Jing Ye 001; Shaowei Cai 001; Huawei Li 001; Xiaowei Li 001 (Integr., 2025)

ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy. - Jiaping Tang; Jianan Mu; Silin Liu; Zizhen Liu; Feng Gu; Xinyu Zhang; Leyan Wang; Shenwen Liang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (CoRR, 2025)

Extend IVerilog to Support Batch RTL Fault Simulation. - Jiaping Tang; Jianan Mu; Zizhen Liu; Zhiteng Chao; Jing Ye 001; Huawei Li 001 (CoRR, 2025)