A 2× load/store pipe for a low-power 1-GHz embedded processor. - Zongjian Chen; Daniel Murray; Steve Nishimoto; Mark H. Pearce; Max Oyker; Daniel Rodriguez; Robert Rogenmoser; Dongwook (Drew) Suh; Erik Supnet; Vincent von Kaenel; George Yiu (IEEE J. Solid State Circuits, 2003)

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems. - Zongjian Chen; Priya Ananthanarayanan; Sukalp Biswas; Brian Campbell 004; Hao Chen; Shaishav Desai; Dominic Go; Rajat Goel; Vincent von Kaenel; Jason Kassoff; Fabian Klass; Weichun Ku; et al. (ISSCC, 2007)