An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors. - Chengyi Zhang; Hongwei Zhou; Minxuan Zhang; Zuocheng Xing (Asia-Pacific Computer Systems Architecture Conference, 2006)

A 64-bit stream processor architecture for scientific applications. - Xuejun Yang; Xiaobo Yan; Zuocheng Xing; Yu Deng 001; Jiang Jiang; Ying Zhang 032 (ISCA, 2007)

Performance Optimization Strategies of High Performance Computing on GPU. - Anguo Ma; Jing Cai; Yu Cheng; Xiaoqiang Ni; Yuxing Tang; Zuocheng Xing (APPT, 2009)

Design of Testing Struture in Microprocessor Based on JTAG. - Ping Zhang; Yanmin Song; Jianmin Zhang; Zuocheng Xing (ISCID (1), 2009)

Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture. - Jiang Jiang; Vincent Mirian; Kam Pui Tang; Paul Chow; Zuocheng Xing (ReConFig, 2009)

Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming. - Xuejun Yang; Xiaobo Yan; Zuocheng Xing; Yu Deng 001; Jiang Jiang; Jing Du 002; Ying Zhang 032 (IEEE Trans. Parallel Distributed Syst., 2009)

A Delay Model of Two-Cycle NoC Router in 2D-Mesh Network. - Shubo Qi; Jinwen Li; Zuocheng Xing; Xiaomin Jia; Minxuan Zhang (ISVLSI, 2010)

A model for energy quantization of single-electron transistor below 10nm. - Xiaobao Chen; Zuocheng Xing; Bingcai Sui (ASICON, 2011)

Characterizing Time-Varying Behavior and Predictability of Cache AVF. - Yu Cheng; Yongwen Wang; Zuocheng Xing; Minxuan Zhang (INCoS, 2011)

Design and Evaluation of Traffic Filter for Token Protocol. - Guitao Fu; Zuocheng Xing; Tianlei Zhao; Xiantuo Tang (PARELEC, 2011)

Accurate and Simplified Prediction of AVF for Delay and Energy Efficient Cache Design. - Anguo Ma; Yu Cheng; Zuocheng Xing (J. Comput. Sci. Technol., 2011)

Validation and analysis of negative differential resistance of single-electron transistor with conductance model. - Xiaobao Chen; Zuocheng Xing; Bingcai Sui (ICECS, 2012)

Tunable Negative Differential Resistance of Single-Electron Transistor Controlled by Capacitance. - Xiaobao Chen; Zuocheng Xing; Bingcai Sui (NCCET, 2013)

A Full Adder Based on Hybrid Single-Electron Transistors and MOSFETs at Room Temperature. - Xiaobao Chen; Zuocheng Xing; Bingcai Sui (NCCET, 2013)

Backhaul-Route Pre-Configuration Mechanism for Delay Optimization in NoCs. - Xiantuo Tang; Feng Wang; Zuocheng Xing; Qinglin Wang (NCCET, 2013)

An Optimizing Strategy Research of LDPC Decoding Based on GPGPU. - Luechao Yuan; Zuocheng Xing; Yang Zhang 026; Xiaobao Chen (TrustCom/ISPA/IUCC, 2013)

Reconfigurable pseudo-NMOS-like logic with hybrid MOS and single-electron transistors. - Xiaobao Chen; Zuocheng Xing; Bingcai Sui; Shi-Ce Ni (IEICE Electron. Express, 2013)

Architecture and Implementation of a Reduced EPIC Processor. - Jun Gao; Minxuan Zhang; Zuocheng Xing; Chaochao Feng (IEICE Trans. Inf. Syst., 2013)

Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router. - Chaochao Feng; Zhonghai Lu; Axel Jantsch; Minxuan Zhang; Zuocheng Xing (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Flexible Virtual Channel Power-Gating for High-Throughput and Low-Power Network-on-Chip. - Feng Wang; Xiantuo Tang; Qinglin Wang; Zuocheng Xing; Hengzhu Liu (DSD, 2014)

Parallel 3D deterministic particle transport on Intel MIC architecture. - Qinglin Wang; Zuocheng Xing; Jie Liu 002; Xiaogang Qiang; Chunye Gong; Jiang Jiang (HPCS, 2014)

The acceleration of turbo decoder on the newest GPGPU of Kepler architecture. - Yang Zhang 026; Zuocheng Xing; Luechao Yuan; Cang Liu; Qinglin Wang (ISCIT, 2014)

UniMESH: The light-weight unidirectional channel Network-on-Chip in 2D mesh topology. - Feng Wang; Xiantuo Tang; Zuocheng Xing; Hengzhu Liu (CONIELECOMP, 2015)

A flexible low-complexity robust THP approach for MISO downlinks with imperfect CSI. - Luechao Yuan; Gaojiang Wang; Gerd Ascheid; Cang Liu; Zuocheng Xing (ICCC, 2015)

DIPP - An LLC Replacement Policy for On-chip Dynamic Heterogeneous Multi-core Architecture. - Yang Zhang 026; Zuocheng Xing; Xiao Ma (ICYCSEE, 2015)

Memory Access Analysis of Many-core System with Abundant Bandwidth. - Chuan Tang; Dan Liu; Zuocheng Xing; Peng Yang 003; Zhe Wang 003; Jiang Xu 001 (MCSoC, 2015)

A GPU-based Fast Solution for Riesz Space Fractional Reaction-Diffusion Equation. - Qinglin Wang; Jie Liu 002; Chunye Gong; Yang Zhang 026; Zuocheng Xing (NBiS, 2015)

A ML-Based High-Accuracy Estimation of Sampling and Carrier Frequency Offsets for OFDM Systems. - Cang Liu; Luechao Yuan; Zuocheng Xing; Xiantuo Tang; Guitao Fu (NCCET, 2015)

Channel Estimation in Massive MIMO: Algorithm and Hardware. - Chuan Tang; Cang Liu; Luechao Yuan; Zuocheng Xing (NCCET, 2015)

Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture. - Qinglin Wang; Jie Liu 002; Xiantao Cui; Guitao Fu; Chunye Gong; Zuocheng Xing (PACRIM, 2015)

Applying Partial Power-Gating to Direction-Sliced Network-on-Chip. - Feng Wang; Xiantuo Tang; Zuocheng Xing (J. Electr. Comput. Eng., 2015)

Applying partial power-gating to bit-sliced network-on-chip. - Feng Wang; Xiantuo Tang; Zuocheng Xing (Microelectron. J., 2015)

Hardware design of ML algorithm in MIMO-OFDM system. - Suncheng Xiang; Minxuan Zhang; Zuocheng Xing; Cang Liu (ICSAI, 2016)

Optimization of Two Bottleneck Programs in SAR System on GPGPU. - Yang Zhang 026; Zuocheng Xing; Cang Liu; Chuan Tang; Lirui Chen; Qinglin Wang (NCCET, 2016)

An Architecture of Parallel Tiled QRD Algorithm for MIMO-OFDM Systems. - Cang Liu; Chuan Tang; Zuocheng Xing; Lirui Chen; Yang Zhang 026; Guitao Fu (Trustcom/BigDataSE/ISPA, 2016)

Locality Protected Dynamic Cache Allocation Scheme on GPUs. - Yang Zhang 026; Zuocheng Xing; Li Zhou 002; Chunsheng Zhu (Trustcom/BigDataSE/ISPA, 2016)

QRD Architecture Using the Modified ILMGS Algorithm for MIMO Systems. - Cang Liu; Chuan Tang; Zuocheng Xing; Luechao Yuan; Yu Wang 068; Lirui Chen; Yang Zhang 026; Suncheng Xiang; Wangfeng Zhao; Xing Hu; Jinsong Xu (WICON, 2016)

High Precision Low Complexity Matrix Inversion Based on Newton Iteration for Data Detection in the Massive MIMO. - Chuan Tang; Cang Liu; Luechao Yuan; Zuocheng Xing (IEEE Commun. Lett., 2016)

QR decomposition architecture using the iteration look-ahead modified Gram-Schmidt algorithm. - Cang Liu; Chuan Tang; Luechao Yuan; Zuocheng Xing; Yang Zhang 026 (IET Circuits Devices Syst., 2016)

Low latency QRD algorithm for future communication. - Lirui Chen; Cang Liu; Yu Wang 068; Zuocheng Xing; Yang Zhang 026; Jing Liu (IEICE Electron. Express, 2017)

Approximate iteration detection with iterative refinement in massive MIMO systems. - Chuan Tang; Cang Liu; Luechao Yuan; Zuocheng Xing (IET Commun., 2017)

A Novel Architecture to Eliminate Bottlenecks in a Parallel Tiled QRD Algorithm for Future MIMO Systems. - Cang Liu; Zuocheng Xing; Luechao Yuan; Chuan Tang; Yang Zhang 026 (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Hardware Architecture Based on Parallel Tiled QRD Algorithm for Future MIMO Systems. - Cang Liu; Chuan Tang; Zuocheng Xing; Luechao Yuan; Yang Zhang 026 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Flexible Divide-and-Conquer MPSoC Architecture for MIMO Interference Cancellation. - Luechao Yuan; Cang Liu; Chuan Tang; Shan Huang; Anupam Chattopadhyay; Gerd Ascheid; Zuocheng Xing (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Low Latency SCAN-Flip Polar Decoder for 5G Vehicular Communication. - Yu Wang 068; Lirui Chen; Shikai Qiu; Li Huang; Zuocheng Xing (INTSYS, 2018)

Locality based warp scheduling in GPGPUs. - Yang Zhang 026; Zuocheng Xing; Cang Liu; Chuan Tang; Qinglin Wang (Future Gener. Comput. Syst., 2018)

Locality-protected cache allocation scheme with low overhead on GPUs. - Yang Zhang 026; Zuocheng Xing; Chuan Tang; Cang Liu (IET Comput. Digit. Tech., 2018)

CWLP: coordinated warp scheduling and locality-protected cache allocation on GPUs. - Yang Zhang 026; Zuocheng Xing; Cang Liu; Chuan Tang (Frontiers Inf. Technol. Electron. Eng., 2018)

Optimization Methods for Computing System in Mobile CPS. - Yang Zhang 026; Zuocheng Xing; Yu Wang 068; Lirui Chen; Qinglin Wang; Yufei Zhu (ICBDT, 2019)

Algorithm and Architecture for Path Metric Aided Bit-Flipping Decoding of Polar Codes. - Yu Wang 068; Lirui Chen; Qinglin Wang; Yang Zhang 026; Zuocheng Xing (WCNC, 2019)

An Improved Concatenation Scheme of BCH-Polar Codes With Low-Latency Decoding Architecture. - Yu Wang 068; Lirui Chen; Cang Liu; Zuocheng Xing (IEEE Access, 2019)

A Low-Latency Successive Cancellation Hybrid Decoder for Convolutional Polar Codes. - Yu Wang 068; Shikai Qiu; Lirui Chen; Qinglin Wang; Yang Zhang 026; Cang Liu; Zuocheng Xing (ICASSP, 2020)

A Paralleled Greedy LLL Algorithm for 16×16 MIMO Detection. - Lirui Chen; Yu Wang 068; Zuocheng Xing; Shikai Qiu; Qinglin Wang; Yang Zhang 026 (ISCAS, 2020)

Efficient MIMO Preprocessor With Sorting-Relaxed QR Decomposition and Modified Greedy LLL Algorithm. - Lirui Chen; Zuocheng Xing; Yongzhong Li; Shikai Qiu (IEEE Access, 2020)

An Area-Efficient Hybrid Polar Decoder With Pipelined Architecture. - Yu Wang 068; Qinglin Wang; Yang Zhang 026; Shikai Qiu; Zuocheng Xing (IEEE Access, 2020)

Practical AMC model based on SAE with various optimisation methods under different noise environments. - Zerun Li; Qinglin Wang; Weisong Liu; Qiang Xu; Zuocheng Xing; Yongzhong Li (IET Commun., 2020)

A Noc Centric Low Overhead Multi-chip Interconnection Technology. - Xing Hu; Yang Zhang 026; Li Mao; Jie Shen 003; Zuocheng Xing (HPCC/DSS/SmartCity/DependSys, 2021)

Area-Efficient Parallel Reconfigurable Stream Processor for Symmetric Cryptograph. - Yufei Zhu; Zuocheng Xing; Jinhui Xue; Zerun Li; Yifan Hu; Yang Zhang 026; Yongzhong Li (IEEE Access, 2021)

Low latency group-sorted QR decomposition algorithm for larger-scale MIMO systems. - Lirui Chen; Yu Wang 068; Zuocheng Xing; Shikai Qiu; Qinglin Wang; Yongzhong Li (IET Commun., 2021)

High Area-Efficient Parallel Encoder with Compatible Architecture for 5G LDPC Codes. - Yufei Zhu; Zuocheng Xing; Zerun Li; Yang Zhang 026; Yifan Hu (Symmetry, 2021)

Automatic Modulation Classification for MASK, MPSK, and MQAM Signals Based on Hierarchical Self-Organizing Map. - Zerun Li; Qinglin Wang; Yufei Zhu; Zuocheng Xing (Sensors, 2022)