Barry Rountree

Orcid: 0000-0002-0087-4301

Affiliations:
  • Lawrence Livermore National Laboratory (LLNL), Livermore, CA, USA


According to our database1, Barry Rountree authored at least 77 papers between 2004 and 2023.

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Bibliography

2023
Nonsense Code: A Nonmaterial Performance.
Digit. Humanit. Q., 2023

msr-genie: Navigating Model Specific Registers Across Processor Generations.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2022
SpackNVD: A Vulnerability Audit Tool for Spack Packages.
Proceedings of the IEEE/ACM First International Workshop on Cyber Security in High Performance Computing, 2022

2021
Evaluating adaptive and predictive power management strategies for optimizing visualization performance on supercomputers.
Parallel Comput., 2021

Systemic Assessment of Node Failures in HPC Production Platforms.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

Monitoring Large Scale Supercomputers: A Case Study with the Lassen Supercomputer.
Proceedings of the IEEE International Conference on Cluster Computing, 2021

2020
Aarohi: Making Real-Time Node Failure Prediction Feasible.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2019
Rescal-snow: Simulating snow dunes with cellular automata.
J. Open Source Softw., 2019

Deep learning predictions of sand dune migration.
CoRR, 2019

Comparing GPU Power and Frequency Capping: A Case Study with the MuMMI Workflow.
Proceedings of the 2019 IEEE/ACM Workflows in Support of Large-Scale Science, 2019

Uncore power scavenger: a runtime for uncore power conservation on HPC systems.
Proceedings of the International Conference for High Performance Computing, 2019

Power and Performance Tradeoffs for Visualization Algorithms.
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

Power efficient job scheduling by predicting the impact of processor manufacturing variability.
Proceedings of the ACM International Conference on Supercomputing, 2019

2018
Analyzing Resource Trade-offs in Hardware Overprovisioned Supercomputers.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium, 2018

PShifter: feedback-based dynamic power shifting within HPC jobs for performance.
Proceedings of the 27th International Symposium on High-Performance Parallel and Distributed Computing, 2018

2017
Managing the Performance/Error Tradeoff of Floating-point Intensive Applications.
ACM Trans. Embed. Comput. Syst., 2017

PANN: Power Allocation via Neural Networks Dynamic Bounded-Power Allocation in High Performance Computing.
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing, 2017

Scalable performance bounding under multiple constrained renewable resources.
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing, 2017

An empirical survey of performance and energy efficiency variation on Intel processors.
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing, 2017

Performance modeling under resource constraints using deep transfer learning.
Proceedings of the International Conference for High Performance Computing, 2017

Simulating Power Scheduling at Scale.
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing, 2017

Production Hardware Overprovisioning: Real-World Performance Optimization Using an Extensible Power-Aware Resource Management Framework.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Towards a Unified Monitoring Framework for Power, Performance and Thermal Metrics: A Case Study on the Evaluation of HPC Cooling Systems.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Power Aware High Performance Computing: Challenges and Opportunities for Application and System Developers - Survey & Tutorial.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

PaViz: A Power-Adaptive Framework for Optimizing Visualization Performance.
Proceedings of the 17th Eurographics Symposium on Parallel Graphics and Visualization, 2017

2016
Exploiting Redundancy and Application Scalability for Cost-Effective, Time-Constrained Execution of HPC Applications on Amazon EC2.
IEEE Trans. Parallel Distributed Syst., 2016

Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052).
Dagstuhl Reports, 2016

Economic Viability of Hardware Overprovisioning in Power-Constrained High Performance Computing.
Proceedings of the 4th International Workshop on Energy Efficient Supercomputing, 2016

Floating-Point Shadow Value Analysis.
Proceedings of the 5th Workshop on Extreme-Scale Programming Tools, 2016

A Unified Platform for Exploring Power Management Strategies.
Proceedings of the 4th International Workshop on Energy Efficient Supercomputing, 2016

I/O Aware Power Shifting.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

HPPAC Introduction and Committees.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Power Balancing in an Emulated Exascale Environment.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

A Power-Aware Cost Model for HPC Procurement.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Power Tuning HPC Jobs on Power-Constrained Systems.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
CoreTSAR: Core Task-Size Adapting Runtime.
IEEE Trans. Parallel Distributed Syst., 2015

Electrical Grid and Supercomputing Centers: An Investigative Analysis of Emerging Opportunities and Challenges.
Inform. Spektrum, 2015

Power-Bounded HPC Performance Optimization (Dagstuhl Perspectives Workshop 15342).
Dagstuhl Reports, 2015

A Run-Time System for Power-Constrained HPC Applications.
Proceedings of the High Performance Computing - 30th International Conference, 2015

Analyzing and mitigating the impact of manufacturing variability in power-constrained supercomputing.
Proceedings of the International Conference for High Performance Computing, 2015

Dynamic power sharing for higher job throughput.
Proceedings of the International Conference for High Performance Computing, 2015

Finding the limits of power-constrained application performance.
Proceedings of the International Conference for High Performance Computing, 2015

Iso-Power-Efficiency: An Approach to Scaling Application Codes with a Power Budget.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

HPPAC Introduction and Committees.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Application Runtime Variability and Power Optimization for Exascale Computers.
Proceedings of the 5th International Workshop on Runtime and Operating Systems for Supercomputers, 2015

Practical Resource Management in Power-Constrained, High Performance Computing.
Proceedings of the 24th International Symposium on High-Performance Parallel and Distributed Computing, 2015

POW: System-wide Dynamic Reallocation of Limited Power in HPC.
Proceedings of the 24th International Symposium on High-Performance Parallel and Distributed Computing, 2015

Distributed Monitoring and Management of Exascale Systems in the Argo Project.
Proceedings of the Distributed Applications and Interoperable Systems, 2015

2014
Tools and methods for measuring and tuning the energy efficiency of HPC systems.
Sci. Program., 2014

CoreTSAR: Adaptive Worksharing for Heterogeneous Systems.
Proceedings of the Supercomputing - 29th International Conference, 2014

Dissecting On-Node Memory Access Performance: A Semantic Approach.
Proceedings of the International Conference for High Performance Computing, 2014

Adaptive Configuration Selection for Power-Constrained Heterogeneous Systems.
Proceedings of the 43rd International Conference on Parallel Processing, 2014

Exploiting redundancy for cost-effective, time-constrained execution of HPC applications on amazon EC2.
Proceedings of the 23rd International Symposium on High-Performance Parallel and Distributed Computing, 2014

2013
Parallelizing heavyweight debugging tools with mpiecho.
Parallel Comput., 2013

Performance Analysis Techniques for the Exascale Co-Design Process.
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013

A Simplified and Accurate Model of Power-Performance Efficiency on Emergent GPU Architectures.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

Exploring hardware overprovisioning in power-constrained, high performance computing.
Proceedings of the International Conference on Supercomputing, 2013

A comparative study of high-performance computing on the cloud.
Proceedings of the 22nd International Symposium on High-Performance Parallel and Distributed Computing, 2013

Optimizing power allocation to CPU and memory subsystems in overprovisioned HPC systems.
Proceedings of the 2013 IEEE International Conference on Cluster Computing, 2013

2012
Abstract: Three Steps to Model Power-Performance Efficiency for Emergent GPU-Based Parallel Systems.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Heterogeneous Task Scheduling for Accelerated OpenMP.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Beyond DVFS: A First Look at Performance under a Hardware-Enforced Power Bound.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing.
Proceedings of the 41st International Conference on Parallel Processing, 2012

2011
Large scale debugging of parallel tasks with AutomaDeD.
Proceedings of the Conference on High Performance Computing Networking, 2011

Practical performance prediction under Dynamic Voltage Frequency Scaling.
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2010
Using focused regression for accurate time-constrained scaling of scientific applications.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2009
Theory and Practice of Dynamic Voltage/Frequency Scaling in the High Performance Computing Environment.
PhD thesis, 2009

Adagio: making DVS practical for complex HPC applications.
Proceedings of the 23rd international conference on Supercomputing, 2009

2008
A regression-based approach to scalability prediction.
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

2007
Analyzing the Energy-Time Trade-Off in High-Performance Computing Applications.
IEEE Trans. Parallel Distributed Syst., 2007

Dynamic Binary Instrumentation and Data Aggregation on Large Scale Systems.
Int. J. Parallel Program., 2007

Bounding energy consumption in large-scale MPI programs.
Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

2006
Implicit array bounds checking on 64-bit architectures.
ACM Trans. Archit. Code Optim., 2006

Minimizing execution time in MPI programs on an energy-constrained, power-scalable cluster.
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2006

2005
Scalable dynamic binary instrumentation for Blue Gene/L.
SIGARCH Comput. Archit. News, 2005

Notes from HPPAC 2005.
SIGARCH Comput. Archit. News, 2005

2004
Implicit java array bounds checking on 64-bit architecture.
Proceedings of the 18th Annual International Conference on Supercomputing, 2004


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