Aadarsh G. Goenka
Orcid: 0000-0002-7229-1471
According to our database1,
Aadarsh G. Goenka
authored at least 3 papers
between 2023 and 2025.
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Bibliography
2025
An algorithmic approach to construct the library of universal logic gates beyond NAND and NOR.
Integr., 2025
2023
A Low Latency and Compact GCD Design Using an Intelligent Seed-Selection Scheme of LL-PRNG.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
ULGss: A Strategy to construct a Library of Universal Logic Gates for N-variable Boolean Logic beyond NAND and NOR.
CoRR, 2023