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Anand Arunachalam

Affiliations:
  • Synopsys, Mountain View , CA, USA
  • University of Michigan, Ann Arbor, MI, USA (former)


According to our database1, Anand Arunachalam authored at least 3 papers between 2012 and 2015.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
A Methodology for Placement of Regular and Structured Circuits.
[BibTeX]
[DOI]
Suman Chatterjee
,
Vikram Singh Saun
,
Anand Arunachalam
Proceedings of the 28th International Conference on VLSI Design, 2015

2014
Integrated structured placement design methodology in place and route flow.
[BibTeX]
[DOI]
Anand Arunachalam
Proceedings of the International Symposium on Physical Design, 2014

2012
Integrated Placement and Optimization Flow for Structured and Regular Logic.
[BibTeX]
[DOI]
Vikram Singh Saun
,
Suman Chatterjee
,
Anand Arunachalam
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012


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