B. S. Kariyappa

According to our database, B. S. Kariyappa authored at least 6 papers between 2009 and 2025.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2025

Design and Implementation of Approximate Hybrid Floating-Point Multipliers for Signal-Processing Applications.

B. S. Gurucharan, Anwesh Rao, B. S. Kariyappa

IEEE Access, 2025

2021

Rider-Deep-LSTM Network for Hybrid Distance Score-Based Fault Prediction in Analog Circuits.

D. Binu, B. S. Kariyappa

IEEE Trans. Ind. Electron., 2021

Multi-Rider Optimization-Based Neural Network for Fault Isolation in Analog Circuits.

D. Binu, B. S. Kariyappa

J. Circuits Syst. Comput., 2021

2019

RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits.

D. Binu, B. S. Kariyappa

IEEE Trans. Instrum. Meas., 2019

2017

Design and implementation of 8-bit vedic multiplier using mGDI technique.

Shashank S. Meti, C. N. Bharath, Y. G. Praveen Kumar, B. S. Kariyappa

Proceedings of the 2017 International Conference on Advances in Computing, 2017

2009

Micro Controller Based Ac Power Controller.

S. A. Hari Prasad, B. S. Kariyappa, R. Nagaraj, S. K. Thakur

Wirel. Sens. Netw., 2009