C. Paramasivam

According to our database, C. Paramasivam authored at least 5 papers between 2008 and 2025.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2025

Performance analysis of 4:1 MUX APUF Architecture Implemented on Zynq 7000 SoC FPGA.

Kaveri Hatti, C. Paramasivam

Integr., 2025

Enhanced Performance of New Scaling-Free CORDIC for Memory-Based Fast Fourier Transform Architecture.

C. Paramasivam, Sandeep Singh Chauhan, Veerpratap Meena, A. Sreejagathi, B. A. V. N. Hasini, K. L. K. Kishore, T. V. N. G. Vamsikrishna, M. Durga Ananta Sai, Abdessamad Didi

IEEE Access, 2025

2024

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface.

Naveen C, Sandeep Singh Chauhan, C. Paramasivam, Veerpratap Meena

IEEE Access, 2024

2022

Deep Learning Based Covid-19 Patients Detection.

C. Paramasivam, R. Priyadarsini

Proceedings of the Computational Intelligence in Data Science, 2022

2008

Computer vision based positional error compensation of an industrial robot using linear regression analysis.

T. Sornakumar, C. Paramasivam

Int. J. Manuf. Res., 2008