Chengyan Ma

According to our database, Chengyan Ma authored at least 6 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

A dual-band CMOS LC-VCO with highly linear frequency tuning characteristics.

Yanbin Luo, Chengyan Ma, Yebing Gan, Min Qian, Tianchun Ye

Microelectron. J., 2015

2014

A 14-mW PLL-Less Receiver in 0.18-µm CMOS for Chinese Electronic Toll Collection Standard.

Xiaofeng He, Xi Zhu, Lian Duan, Yichuang Sun, Chengyan Ma

IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 95 dB dynamic range automatic gain control circuits and systems for Multi-standard Digital TV tuner.

Xiaofeng He, Yuanjin Zheng, Chengyan Ma, Tianchun Ye

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A current-shaping technique for static MOS current-mode logic prescalers.

Jian Shi, Taishan Mo, Chengyan Ma, Tianchun Ye

IEICE Electron. Express, 2013

A 5.8GHz integrated CMOS transmitter for Chinese electronic toll collection system.

Jian Shi, Shimao Xiao, Yunfeng Yu, Wei Huang, Wenguang Pan, Tianchun Ye, Min Qian, Xiaofeng He, Chengyan Ma

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2011

Optimization and design of a novel prescaler and its application to GPS receivers.

Yunfeng Yu, Tianchun Ye, Chengyan Ma

Sci. China Inf. Sci., 2011