Chien-Wei Cho

According to our database, Chien-Wei Cho authored at least 3 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

32.6 A Dynamic-RON-Diminished Bidirectional GaN Load Switch with Inrush Current Protection and Spike Attenuation.

Po-Jui Chiu, Tz-Wun Wang, Xiao-Quan Wu, Chi-Yu Chen, Yu-Ting Huang, Chien-Wei Cho, Sheng-Hsi Hung, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Hann-Huei Tsai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

32.3 An Accurate Secondary-Side Controller with GaN-8ased CGS Isolated Driver Achieving Sub-1% Error On-Chip Sensing.

Chi-Yu Chen, Tz-Wun Wang, Po-Jui Chiu, Yu-Ting Huang, Xiao-Quan Wu, Chien-Wei Cho, Sheng-Hsi Hung, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Hann-Huei Tsai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

Field Plate and Package Optimization for GaN Devices and Systems.

Sheng-Hsi Hung, Tz-Wun Wang, Chien-Wei Cho, Po-Jui Chiu, Chi-Yu Chen, Ke-Horng Chen, Kuo-Lin Zheng, Chih-Chen Li

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024