Daniel Wendler

According to our database, Daniel Wendler authored at least 7 papers between 2018 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Compact Low-Power Interfacing and Data Reduction for Floating Active Intracortical Neural Probes With Modular Architecture.

Roman Willaredt, Christoph Grandauer, Daniel De Dorigo, Daniel Wendler, Matthias Kuhl, Yiannos Manoli

IEEE Trans. Biomed. Circuits Syst., April, 2025

2024

A Compact Low-Power Bidirectional Two-Wire Interface for Digital Neural Probes.

Daniel De Dorigo, Roman Willaredt, Christoph Grandauer, Daniel Wendler, Yiannos Manoli, Matthias Kuhl

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A 40-KS/s In-Plane Stress Sensing ΔΣ Frontend Integrated into a 2×48 Needle-Shaped Array.

Christoph Grandauer, Daniel De Dorigo, Daniel Wendler, Roman Willaredt, Michael Kult, Yiannos Manoli, Matthias Kuhl

Proceedings of the 2024 IEEE SENSORS, Kobe, Japan, October 20-23, 2024, 2024

Data Rate Reduction in Intracranial Digital Neural Probes using Delta Encoding.

Daniel Wendler, Jan Körber, Daniel De Dorigo, Roman Willaredt, Matthias Kuhl, Yiannos Manoli

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2024

2023

A 0.0046-mm² Two-Step Incremental Delta-Sigma Analog-to-Digital Converter Neuronal Recording Front End With 120-mVpp Offset Compensation.

Daniel Wendler, Daniel De Dorigo, Mohammad Amayreh, Alexander Bleitner, Maximilian Marx, Roman Willaredt, Yiannos Manoli

IEEE J. Solid State Circuits, February, 2023

2021

28.7 A 0.00378mm² Scalable Neural Recording Front-End for Fully Immersible Neural Probes Based on a Two-Step Incremental Delta-Sigma Converter with Extended Counting and Hardware Reuse.

Daniel Wendler, Daniel De Dorigo, Mohammad Amayreh, Alexander Bleitner, Maximilian Marx, Yiannos Manoli

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2018

Fully Immersible Subcortical Neural Probes With Modular Architecture and a Delta-Sigma ADC Integrated Under Each Electrode for Parallel Readout of 144 Recording Sites.

Daniel DeDorigo, Christian Moranz, Hagen Graf, Maximilian Marx, Daniel Wendler, Boyu Shui, Abdalrahman Sayed Herbawi, Matthias Kuhl, Patrick Ruther, Oliver Paul, Yiannos Manoli

IEEE J. Solid State Circuits, 2018