David M. Russinoff
  According to our database1,
  David M. Russinoff
  authored at least 24 papers
  between 1985 and 2025.
  
  
Collaborative distances:
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Bibliography
  2025
    Proceedings of the Proceedings 19th International Workshop on the ACL2 Theorem Prover and Its Applications, July, 2025
    
  
  2023
    Proceedings of the 18th International Workshop on the ACL2 Theorem Prover and Its Applications, 2023
    
  
    Proceedings of the 18th International Workshop on the ACL2 Theorem Prover and Its Applications, 2023
    
  
  2022
    Proceedings of the Proceedings Seventeenth International Workshop on the ACL2 Theorem Prover and its Applications, 2022
    
  
    Proceedings of the Proceedings Seventeenth International Workshop on the ACL2 Theorem Prover and its Applications, 2022
    
  
Formal Verification of a Chained Multiply-Add Design: Combining Theorem Proving and Equivalence Checking.
    
  
    Proceedings of the 29th IEEE Symposium on Computer Arithmetic, 2022
    
  
Formal Verification of Floating-Point Hardware Design - A Mathematical Approach, Second Edition
    
  
    Springer, ISBN: 978-3-030-87180-2, 2022
    
  
  2020
    Proceedings of the Sixteenth International Workshop on the ACL2 Theorem Prover and its Applications, 2020
    
  
  2017
    Proceedings of the Proceedings 14th International Workshop on the ACL2 Theorem Prover and its Applications, 2017
    
  
  2014
    Proceedings of the Proceedings Twelfth International Workshop on the ACL2 Theorem Prover and its Applications, 2014
    
  
  2013
Computation and Formal Verification of SRT Quotient and Square Root Digit Selection Tables.
    
  
    IEEE Trans. Computers, 2013
    
  
  2010
    Proceedings of the Design and Verification of Microprocessor Systems for High-Assurance Applications., 2010
    
  
  2007
    Proceedings of the Computer Aided Verification, 19th International Conference, 2007
    
  
  2000
A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon<sup>TM</sup> Processor.
    
  
    Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000
    
  
  1999
A Mechanically Checked Proof of Correctness of the AMD K5 Floating Point Square Root Microcode.
    
  
    Formal Methods Syst. Des., 1999
    
  
  1998
A Mechanically Checked Proof of IEEE Compliance of the Floating Point Multiplication, Division and Square Root Algorithms of the AMD-K7<sup>™</sup> Processor.
    
  
    LMS J. Comput. Math., 1998
    
  
  1995
    Formal Methods Syst. Des., 1995
    
  
  1994
  1993
Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits.
  
    Proceedings of the Specification and validation methods, 1993
    
  
  1992
A Verification System for Current Programs Based on the Boyer-Moore Prover.
  
    Formal Aspects Comput., 1992
    
  
  1989
    Proceedings of the Object-Oriented Concepts, Databases, and Applications., 1989
    
  
  1985
    J. Autom. Reason., 1985