Gerasimos Theodoratos
According to our database1,
Gerasimos Theodoratos
authored at least 9 papers
between 2006 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
A 4.8ps Resolution, PVT-insensitive Vernier-based TDC using switched-RO PLL and Back Gate Calibration.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025
2016
IEEE J. Solid State Circuits, 2016
2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2007
A Low-Voltage 5-GHz Downconversion Mixer Employing A Second Harmonic Injection Linearization Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE J. Solid State Circuits, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006