Guang Yong Chu
Orcid: 0000-0001-8328-021X
According to our database1,
Guang Yong Chu
authored at least 8 papers
between 2015 and 2025.
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Bibliography
2025
A 0.16 pJ/bit 32 Gb/s NRZ Equalizer with Fixed Peak Frequency and Tunable Gain in 65 nm CMOS.
J. Circuits Syst. Comput., 2025
2024
A High Efficiency 14-28 Gb/s Tunable Receiver Analog Front-End in 65 nm CMOS Technology.
J. Circuits Syst. Comput., May, 2024
2023
A 25Gb/s RX front-end with multi-stage linear equalizer and 3-tap speculative DFE in 65nm CMOS technology.
IEICE Electron. Express, 2023
2017
Field-trial of a λ-to-the-user high-budget PON using a novel class of low-cost coherent transceivers and compatible with EPON system operation.
Proceedings of the 2017 19th International Conference on Transparent Optical Networks (ICTON), 2017
2016
PhD thesis, 2016
2015
Performance comparison between direct phase modulated DFB and RSOA for cost effective transmitter in udWDM-PONs.
Proceedings of the 17th International Conference on Transparent Optical Networks, 2015
Chip integrated DFB-EAM for directly phase modulation performance improvement in UDWDM-PON.
Proceedings of the European Conference on Optical Communication, 2015
First demonstration of monolithically integrated dual output DEML for full-duplex UDWDM-PON ONU.
Proceedings of the European Conference on Optical Communication, 2015