Ke Liu

Orcid: 0000-0002-3960-1124

Affiliations:

University of Electronic Science and Technology of China, School of Automation Engineering, Chengdu, China

According to our database¹, Ke Liu authored at least 16 papers between 2015 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of three.

Timeline

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PhD thesis

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Bibliography

2025

Design of Synchronous Multichannel Cascadable High-Speed Arbitrary Waveform Generator.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2025

2024

Design of even-order variable fractional delay FIR filters based on pivot element weighting iterative algorithm.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2024

2023

Constraint Models of SDRAM-Based Arbitrary Waveform Generator.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2023

2022

Noniterative WLS design of digital FIR filters for aliasing errors cancellation in bandwidth interleaving digital-to-analog converter.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2022

Research on Analog Integrated Circuit Test Parameter Set Reduction Based on XGBoost.

[BibT_eX]

[DOI]

J. Electron. Test., 2022

Selecting the optimal sampling rate for the waveform generator with a variable clock.

[BibT_eX]

[DOI]

Digit. Signal Process., 2022

A Digital Noise Signal Synthesis Method Based on a Combination of Table Look-up and Transformation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Communication Technology, 2022

2021

Cyber-Physical Healthcare System With Blood Test Module on Broadcast Television Network for Remote Cardiovascular Disease (CVD) Management.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2021

Model Transferability from ImageNet to Lithography Hotspot Detection.

[BibT_eX]

[DOI]

Yindong Xiao

XueQian Huang

Ke Liu

J. Electron. Test., 2021

2020

An estimation method of timing mismatch error in hybrid filter bank DACs.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2020

2019

Optimization of synthesis filters for hybrid filter bank DACs.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2019

Minimax and WLS Designs of Digital FIR Filters Using SOCP for Aliasing Errors Reduction in BI-DAC.

[BibT_eX]

[DOI]

IEEE Access, 2019

A Sampling Rate Selecting Algorithm for the Arbitrary Waveform Generator.

[BibT_eX]

[DOI]

IEEE Access, 2019

Minimizing the Jitter of Duty Cycle Distortion Correction Technology Based on Cross Point Eye Diagram Correction.

[BibT_eX]

[DOI]

IEEE Access, 2019

2018

Minimax design of digital FIR filters using linear programming in bandwidth interleaving digital-to-analog converter.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2018

2015

Analysis of Phase Truncation Error Based on Multi-Path Pseudo-Interleaved Direct Digital Frequency Synthesis.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2015

Ke Liu

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