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Kim Allinger

Orcid: 0009-0005-8872-0452

According to our database1, Kim Allinger authored at least 3 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Self Clocked Digital LDO for Cryogenic Power Management in 22nm FDSOI with 98 Percent Efficiency.
[BibTeX]
[DOI]
Arun Ashok
,
A. Cabrera
,
S. Baje
,
André Zambanini
,
Kim Allinger
,
Andreas Bahr
,
Stefan van Waasen
CoRR, May, 2025

2024
Modeling of CMOS Integrated Strain Sensors and Sensitivity Enhanced Readout Architecture.
[BibTeX]
[DOI]
Kim Allinger
,
Andreas Bahr
,
Matthias Kuhl
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023
A Closed-Loop 12bit CMOS-Integrated Stress Sensor System with 4bit Adjustable Sensitivity from 178 to 11 kPa/LSB at up to 22.5kS/s and 5bit Dynamic Range Adjustment.
[BibTeX]
[DOI]
Kim Allinger
,
Matthias KuhI
Proceedings of the IEEE International Solid- State Circuits Conference, 2023


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