Maoyang Xiang

According to our database, Maoyang Xiang authored at least 13 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

On-Device Qwen2.5: Efficient LLM Inference with Model Compression and Hardware Acceleration.

Maoyang Xiang, Ramesh Fernando, Bo Wang

CoRR, April, 2025

2024

How to Mitigate the Dependencies of ChatGPT-4o in Engineering Education.

Maoyang Xiang, Tee Hui Teo

CoRR, 2024

Digital ASIC Design with Ongoing LLMs: Strategies and Prospects.

Maoyang Xiang, Emil Goh, Tee Hui Teo

CoRR, 2024

FPGA Digital Dice using Pseudo Random Number Generator.

Michael Lim Kee Hian, Ten Wei Lin, Zachary Wu Xuan, Stephanie-Ann Loy, Maoyang Xiang, Tee Hui Teo

CoRR, 2024

Logistic Map Pseudo Random Number Generator in FPGA.

Mateo Jalen Andrew Calderon, Lee Jun Lei Lucas, Syarifuddin Azhar Bin Rosli, Stephanie See Hui Ying, Jarell Lim En Yu, Maoyang Xiang, Tee Hui Teo

CoRR, 2024

Hardware Implementation of Double Pendulum Pseudo Random Number Generator.

Jarrod Lim, Tom Manuel Opalla Piccio, Chua Min Jie Michelle, Maoyang Xiang, Tee Hui Teo

CoRR, 2024

From English to ASIC: Hardware Implementation with Large Language Model.

Emil Goh, Maoyang Xiang, I-Chyn Wey, Tee Hui Teo

CoRR, 2024

Hardware Implementation of Multi-LFSR Pseudo Random Number Generator.

Tee Hui Teo, Maoyang Xiang, Mostafa Elsharkawy, Hen Rin Leao, Jiacheng Xie, Hong Sheng Ek, Kang Yi Lee, Wee Yi Koh

Proceedings of the IEEE Region 10 Conference, 2024

Hardware Implementation of Double Pendulum Pseudo Random Number Generator.

Tee Hui Teo, Maoyang Xiang, Hen Rin Leao, Keye Qian, Jarrod Lim, Tom Manuel Opalla Piccio, Chua Min Jie Michelle

Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024

Open-AI Driven Open-source Open-access Sustainable ICs Design Flow.

Tee Hui Teo, Maoyang Xiang, Emil Goh, Huan-Ke Hsu

Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024

Design and Implementation of a Logistic Map-Based Pseudo-Random Number Generator on FPGA.

Tee Hui Teo, Maoyang Xiang, Mostafa Elsharkawy, Hen Rin Leao, Mateo Jalen Andrew Calderon, Lee Jun Lei Lucas, Syarifuddin Azhar Bin Rosli, Hui Ying See, Jarell Lim En Yu

Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024

2023

Implementation of Physics Informed Neural Networks on Edge Device.

Xuezhi Zhang, I-Chyn Wey, Maoyang Xiang, Tee Hui Teo

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

2021

A Multi-scale Binarized Neural Network Application Based on All Programmable System on Chip.

Maoyang Xiang, Tee Hui Teo

Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021