Meghana Shrivastava

Orcid: 0009-0002-4964-0933

According to our database¹, Meghana Shrivastava authored at least 3 papers between 2023 and 2025.

Collaborative distances:

Dijkstra number² of six.
Erdős number³ of six.

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2025

VCII-Based Immittance Simulators: Generalized Parallel Configurations.

[BibT_eX]

[DOI]

Meghana Shrivastava

Data Ram Bhaskar

Pragati Kumar

Int. J. Circuit Theory Appl., 2025

2024

Floating parallel lossy inductance, parallel lossy capacitance, parallel C-D, and lossless capacitance multiplier circuits using current feedback operational amplifiers.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., March, 2024

2023

New negative-grounded capacitance multiplier circuits.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., March, 2023

Meghana Shrivastava

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