Munjae Chae

According to our database, Munjae Chae authored at least 3 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

34.1 A 65fsrms-Jitter and -272dB-FoMjitter, N 10.1GHz Fractional-N Digital PLL with a Quantization-Error-Compensating BBPD and an Orthogonal-Polynomial LMS Calibration.

Munjae Chae, Seheon Jang, Chanwoong Hwang, Hangi Park, Jaehyouk Choi

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

A Low-Jitter and Compact-Area Fractional-N Digital PLL With Fast Multi-Variable Calibration Using the Recursive Least-Squares Algorithm.

Seheon Jang, Munjae Chae, Hangi Park, Chanwoong Hwang, Jaehyouk Choi

IEEE J. Solid State Circuits, December, 2024

10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area Fractional-N Digital PLL Using the Recursive-Least-Squares (RLS) Algorithm.

Seheon Jang, Munjae Chae, Hangi Park, Chanwoong Hwang, Jaehyouk Choi

Proceedings of the IEEE International Solid-State Circuits Conference, 2024