Pao-Ying Cheng
Orcid: 0009-0007-7464-2611
According to our database1,
Pao-Ying Cheng
authored at least 2 papers
between 2024 and 2025.
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Bibliography
2025
A New PVT-Resistant Mixed-Signal Circuit Capable of Detecting Clock Glitches on IoT Devices Which Shorten the Clock Period by 0.9 ns Only.
IEEE Internet Things J., October, 2025
2024
Novel High Throughput-to-Area Efficiency and Strong-Resilience Datapath of AES for Lightweight Implementation in IoT Devices.
IEEE Internet Things J., May, 2024