Preetam Tadeparthy

According to our database, Preetam Tadeparthy authored at least 7 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Generalized Resistive DAC Analysis Through Unitized T-Network Element.

T. Bharath, Rohit Narula, Preetam Tadeparthy

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2005

Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area.

A. Seedher, Preetam Tadeparthy, K. A. S. Satheesh, V. T. Anuroop

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Single amplifier bi-quadratic filter topologies in transimpedance configuration.

Gaurav Chandra, Preetam Tadeparthy, Prakash Easwaran

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique].

Preetam Tadeparthy

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A CMOS bandgap reference with correction for device-to-device variation.

Preetam Tadeparthy

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002

Techniques to improve linearity of CMOS sample-and-hold circuits for achieving 100 dB performance at 80 MSps.

Preetam Tadeparthy, M. Das

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 115mW 12-bit 50 MSPS pipelined ADC.

S. Mathur, M. Das, Preetam Tadeparthy, S. Ray, S. Mukherjee, B. L. Dinakaran

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002