Quanrong Zhuang
Orcid: 0009-0007-0483-6453
According to our database1,
Quanrong Zhuang
authored at least 2 papers
between 2024 and 2025.
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Bibliography
2025
9.6 A 6.78MHz Single-Stage Regulating Rectifier with Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131mW Output Power.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2024
A 6.78 MHz Wireless Power and Data Transfer System Achieving Simultaneous 52.6% End-to-End Efficiency and 4.0 Mb/s Forward Data Delivery with Interference-Free Rectifier.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024