Rashmi Seethur

According to our database, Rashmi Seethur authored at least 7 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of eight.
• Erdős number of seven.

2025

A High Gain 0.0831μV/mA Load Regulated Capacitorless LDO with Fast Loop and Nested Miller Compensation (NMC).

Jayalaxmi Kiran Mukre, Jhanavi Kodethoor, Meghna Prakash, P. Anurup, Rashmi Seethur

Proceedings of the International Conference on Electronics, Information, and Communication, 2025

A 17mV Load Transient, Highly Efficient Low Ripple Split-Inductor Based Buck Converter Using Novel Ramp Generation Technique.

Jaldu Asish, Megha T. S, N. Laqueta, Harshitha GR, Rashmi Seethur

Proceedings of the International Conference on Electronics, Information, and Communication, 2025

2024

A 10-bit 0.9-GS/s Segmented Flash ADC.

Chintan M. K, Rashmi Seethur

Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

Low Power TGFF Using Static and Dynamic Pulse Generators.

Nikhil Raghuraj, M. Kaushik, Mrinal Pradeep, Rashmi Seethur

Proceedings of the 15th International Conference on Computing Communication and Networking Technologies, 2024

Design of Novel Phase Frequency Detectors for Low Phase Noise Frequency Multipliers.

A V. Nishchal, Kottu Sai Vasistha, L. Sathya Suryanarayana Sharma, Rashmi Seethur

Proceedings of the 15th International Conference on Computing Communication and Networking Technologies, 2024

Advancements in Automotive Power Electronics: A Novel Split Inductor Based Buck-Boost Converter for Enhanced Performance.

Jaldu Asish, Megha T. S, N. Laqueta, Rashmi Seethur

Proceedings of the 15th International Conference on Computing Communication and Networking Technologies, 2024

Efficient Fourth-Order Buck Converter Design for Hybrid Electric Vehicle Power Systems with State Space Average Modeling and Control.

Jaldu Asish, Megha T. S, N. Laqueta, Rashmi Seethur

Proceedings of the 14th IEEE Annual Computing and Communication Workshop and Conference, 2024