Simon Buhr
Orcid: 0000-0002-6980-2648
  According to our database1,
  Simon Buhr
  authored at least 13 papers
  between 2018 and 2024.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
  2024
A High-Speed Dynamic Element Matching Decoder With Integrated Background Calibration Control.
    
  
    IEEE Trans. Very Large Scale Integr. Syst., November, 2024
    
  
  2021
High Gain and High Bandwidth Fully Differential Difference Amplifier as Current Sense Amplifier.
    
  
    IEEE Trans. Instrum. Meas., 2021
    
  
Subnanosecond Time Synchronization Using a 100Base-TX Ethernet Transceiver and an Optimized PI-Clock Servo.
    
  
    IEEE Trans. Instrum. Meas., 2021
    
  
  2020
    IET Circuits Devices Syst., 2020
    
  
Low Power Class-AB Line Driver with Adaptive Digital Impedance Control for Fast Ethernet.
    
  
    Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
    
  
A 10 Bit Phase-Interpolator-Based Digital-to-Phase Converter for Accurate Time Synchronization in Ethernet Applications.
    
  
    Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
    
  
  2019
    Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
    
  
    Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
    
  
A Compact Inductorless 32 GHz Divide-by-2 CML Frequency Divider on 22 nm FD-SOI Technology.
    
  
    Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
    
  
    Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
    
  
  2018
A 0.1-13 GHz Wide Range Multi-Modulus Divider with Adaptive Sensitivity for Broad Band Operation.
    
  
    Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
    
  
    Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
    
  
Low Power 16 Phase Ring Oscillator and PLL for Use in sub-ns Time Synchronization over Ethernet.
    
  
    Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018