Trevor E. Pogue

Orcid: 0000-0002-6791-3758

According to our database1, Trevor E. Pogue authored at least 4 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Strassen Multisystolic Array Hardware Architectures.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025

Karatsuba Matrix Multiplication and Its Efficient Custom Hardware Implementations.
IEEE Trans. Computers, April, 2025

2024
Fast Inner-Product Algorithms and Architectures for Deep Neural Network Accelerators.
IEEE Trans. Computers, February, 2024

2020
Incremental Fault Analysis: Relaxing the Fault Model of Differential Fault Attacks.
IEEE Trans. Very Large Scale Integr. Syst., 2020


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