Yongzheng Zhan

According to our database, Yongzheng Zhan authored at least 6 papers between 2017 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

10 Gb/s Duobinary transmitter with a 6-tap FFE using 180 nm CMOS technology.

Yinhang Zhang, Chao Yin, Xi Yang, Yongzheng Zhan

Microelectron. J., 2025

A 10 Gb/s PAM4 receiver with reference-less half-rate Bang-Bang CDR in 180-nm CMOS.

Jiaxin Liu, Yinhang Zhang, Chao Yin, Xi Yang, Yongzheng Zhan

Microelectron. J., 2025

DFE Error Propagation Mitigation Using Feed Forward Equalizer and Forward Error Correction in 25 Gb/s NRZ Transceiver.

Yongzheng Zhan, Rengang Li, Tuo Li, Xiaofeng Zou, Qingsheng Hu

J. Circuits Syst. Comput., 2025

2020

DFE Error Propagation and FEC Interleaving for 400GbE PAM4 Electrical Lane.

Yongzheng Zhan, Qingsheng Hu, Yinhang Zhang

IEICE Trans. Electron., 2020

2017

A 20 Gb/s Wireline Receiver with Adaptive CTLE and Half-Rate DFE in 0.13 µm Technology.

Yinhang Zhang, Qingsheng Hu, Yongzheng Zhan

Proceedings of the Wired/Wireless Internet Communications, 2017

IBIS-AMI Based PAM4 Signaling and FEC Technique for 25 Gb/s Serial Link.

Yongzheng Zhan, Qingsheng Hu, Yinhang Zhang

Proceedings of the Wired/Wireless Internet Communications, 2017