Yoshiyuki Ishigaki

According to our database1, Yoshiyuki Ishigaki authored at least 2 papers between 1991 and 1993.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1993
A 5.8-ns 256-Kb BiCMOS TTL SRAM with T-Shaped bit line architecture.
IEEE J. Solid State Circuits, December, 1993

1991
A 7 ns 1 Mb BiCMOS ECL SRAM with shift redundancy.
IEEE J. Solid State Circuits, April, 1991


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