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Yu Wang

Orcid: 0000-0003-2779-1466

Affiliations:
  • University of Strathclyde, Faculty of Engineering, Glasgow, UK


According to our database1, Yu Wang authored at least 5 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Links

Online presence:

On csauthors.net:

Bibliography

2024
A Two-Stage Interpolation Time-to-Digital Converter Implemented in 20 and 28 nm FGPAs.
[BibTeX]
[DOI]
Yu Wang
,
Wujun Xie
,
Haochang Chen
,
Chengquan Pei
,
David Day-Uei Li
IEEE Trans. Ind. Electron., November, 2024

2023
Low-Hardware Consumption, Resolution-Configurable Gray Code Oscillator Time-to-Digital Converters Implemented in 16 nm, 20 nm, and 28 nm FPGAs.
[BibTeX]
[DOI]
Yu Wang
,
Wujun Xie
,
Haochang Chen
,
David Day-Uei Li
IEEE Trans. Ind. Electron., 2023

2022
128-Channel High-Linearity Resolution-Adjustable Time-to-Digital Converters for LiDAR Applications: Software Predictions and Hardware Implementations.
[BibTeX]
[DOI]
Wujun Xie
,
Yu Wang
,
Haochang Chen
,
David Day-Uei Li
IEEE Trans. Ind. Electron., 2022

Multichannel Time-to-Digital Converters With Automatic Calibration in Xilinx Zynq-7000 FPGA Devices.
[BibTeX]
[DOI]
Yu Wang
,
Wujun Xie
,
Haochang Chen
,
David Day-Uei Li
IEEE Trans. Ind. Electron., 2022

Low hardware consumption, resolution-configurable Gray code oscillator time-to-digital converters implemented in 16nm, 20nm and 28nm FPGAs.
[BibTeX]
[DOI]
Yu Wang
,
Wujun Xie
,
Haochang Chen
,
David Day-Uei Li
CoRR, 2022


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