Yuji Hatano

According to our database, Yuji Hatano authored at least 4 papers between 1989 and 1995.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

1995

Data-dependent logic swing internal bus architecture for ultralow-power LSI's.

Mitsuru Hiraki, Hirotsugu Kojima, Hitoshi Misawa, Takashi Akazawa, Yuji Hatano

IEEE J. Solid State Circuits, April, 1995

1991

An all DC-powered Josephson logic circuit.

Yuji Hatano, Hideyuki Nagaishi, Shinichiro Yano, Kouji Nakahara, Hiroji Yamada, Shinya Kominami, Mikio Hirano

IEEE J. Solid State Circuits, August, 1991

1990

A 4-bit, 250-MIPS processor using Josephson technology.

Yuji Hatano, Shinichiro Yano, Hiroyuki Mori, Hiroji Yamada, Mikio Hirano, Ushio Kawabe

IEEE Micro, 1990

1989

A 4-bit Josephson data processor chip.

Yuji Hatano, Shinichiro Yano, Hiroyuki Mori, Hiroji Yamada, Mikio Hirano, Ushio Kawabe

IEEE J. Solid State Circuits, October, 1989