Yunus Emre Yilmaz

Orcid: 0000-0001-5857-5446

According to our database1, Yunus Emre Yilmaz authored at least 8 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
EV2Gym: A Flexible V2G Simulator for EV Smart Charging Research and Benchmarking.
IEEE Trans. Intell. Transp. Syst., February, 2025

A Fast, Efficient, Platform-Adaptive, and AIS-20/31 Compliant PLL-Based True Random Number Generator on an SoC FPGA.
IACR Cryptol. ePrint Arch., 2025

2024
On an Efficient Implementation of Combined True Random Number Generator and Physically Unclonable Function on a SoC FPGA ; Bir SoC FPGA Üzerinde Kombine Gerçek Rastgele Sayı Üreteci ve Fiziksel Olarak Klonlanamayan Fonksiyonun Verimli Bir Uygulaması Üzerine.
PhD thesis, 2024

A Combined Design of 4-PLL-TRNG and 64-bit CDC-7-XPUF on a Zynq-7020 SoC.
IACR Cryptol. ePrint Arch., 2024

32-bit and 64-bit CDC-7-XPUF Implementation on a Zynq-7020 SoC.
IACR Cryptol. ePrint Arch., 2024

Design and Implementation of a Fast, Platform-Adaptive, AIS-20/31 Compliant PLL-Based True Random Number Generator on a Zynq 7020 SoC FPGA.
IACR Cryptol. ePrint Arch., 2024

32-bit and 64-bit CDC-7-XPUF Implementations on a Zynq-7020 SoC.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2024

Reinforcement Learning for Optimized EV Charging Through Power Setpoint Tracking.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Europe, 2024


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