Zhelong Jiang
According to our database1,
Zhelong Jiang
authored at least 5 papers
between 2024 and 2025.
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Bibliography
2025
A RRAM_based In_Memory Computing Architecture for Binary Matrix_Vector Multiplication.
CoRR, January, 2025
IEEE Access, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
A high resolution and configurable 1T1R1C ReRAM macro for medical semantic segmentation.
IEICE Electron. Express, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024