A. Larios

According to our database¹, A. Larios authored at least 2 papers between 1999 and 2000.

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2000

A Chip for a Routing Table Based on a Novel Modified Trie Algorithm.

[BibT_eX]

[DOI]

VLSI Design, 2000

1999

Routing chip based on a modified trie for ATM, IP and Ethernet.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999