Abdsamad Benkrid

Orcid: 0000-0003-2524-5875

According to our database1, Abdsamad Benkrid authored at least 29 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A new flame-based colour space for efficient fire detection.
IET Image Process., 2024

2018
Fire detection in a still image using colour information.
CoRR, 2018

2013
A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures.
Digit. Signal Process., 2013

2012
A generic computer platform for efficient iris recognition.
Proceedings of the 5th IAPR International Conference on Biometrics, 2012

2009
A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension.
IEEE Trans. Very Large Scale Integr. Syst., 2009

An FPGA-Based Web Server for High Performance Biological Sequence Alignment.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008
HIDE+: A Logic Based Hardware Development Environment.
Eng. Lett., 2008

2007
Efficient FPGA hardware development: A multi-language approach.
J. Syst. Archit., 2007

High Performance Biosequence Database Scanning using FPGAs.
Proceedings of the IEEE International Conference on Acoustics, 2007

Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction.
Signal Process., 2006

HIDE: A hardware intelligent description environment.
Microprocess. Microsystems, 2006

2004
Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

2003
Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT.
Proceedings of the Seventh International Symposium on Signal Processing and Its Applications, 2003

A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

An FPGA-Based Image Connected Component Labeller.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2002
Towards a general framework for FPGA based image processing using hardware skeletons.
Parallel Comput., 2002

Design and implementation of a novel algorithm for general purpose median filtering on FPGAs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

A Prolog-Based Hardware Development Environment.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
High level programming for real time FPGA based video processing.
Proceedings of the IEEE International Conference on Acoustics, 2000

1998
An Environment for Generating FPGA Architectures for Image Algebra-based Algorithms.
Proceedings of the 1998 IEEE International Conference on Image Processing, 1998


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