Aditya Anirudh Jonnalagadda

According to our database, Aditya Anirudh Jonnalagadda authored at least 3 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Energy-Efficient Decoding and Encoding Hardware for Optimized Posit Arithmetic.

Aditya Anirudh Jonnalagadda, Rishi Thotli, Sreehari Veeramachaneni, Uppugunduru Anil Kumar, Syed Ershad Ahmed

IEEE Embed. Syst. Lett., June, 2025

2024

ADEPNET: A Dynamic-Precision Efficient Posit Multiplier for Neural Networks.

Aditya Anirudh Jonnalagadda, Uppugunduru Anil Kumar, Rishi Thotli, Satvik Sardesai, Sreehari Veeramachaneni, Syed Ershad Ahmed

IEEE Access, 2024

2023

Design of Energy Efficient Posit Multiplier.

Aditya Anirudh Jonnalagadda, Anil Kumar Uppugunduru, Sreehari Veeramachaneni, Syed Ershad Ahmed

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023