Adrian Leuciuc

According to our database, Adrian Leuciuc authored at least 8 papers between 1994 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A 0.29pJ/b 5.27Tb/s/mm UCIe Advanced Package Link in 3nm FinFET with 2.5D CoWoS Packaging.

Didem Turker Melek, R. Navinkumar, James Vandersand, Pyare Sarkar, BS Prakash, Adrian Leuciuc, Kevin Geary, Shaojun Ma, Chirag Mukesh Mehta, Shashi Jain, Basant Bothra, Pawan Sabharwal, Ranjan Vaish, Kirti Bhanushali, Yutong Ding, Craig Frost, John Annunziata, Krishanu Sadhu, Dimitris Kyritsis, Jeff Bostak, Ming Li, Steve Williams, Ken Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2017

Sampling time calibration method for multi-channel interleaved ADCs.

Adrian Leuciuc

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2009

A 12-b 56MS/s pipelined ADC in 65nm CMOS.

Adrian Leuciuc, William Evans, Honghao Ji, Eric Naviasky, Xinhua He

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2004

Optimal offset averaging for flash and folding A/D converters.

Ovidiu Carnu, Adrian Leuciuc

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

A wide linear range low-voltage transconductor.

Adrian Leuciuc

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

A highly linear low-voltage MOS transconductor.

Adrian Leuciuc, Yi Zhang

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

1998

The realization of inverse system for circuits containing nullors with applications in chaos synchronization.

Adrian Leuciuc

Int. J. Circuit Theory Appl., 1998

1994

Further Generalization of Higher Order Elements: State Characterization and Synthesis.

Liviu Goras, Adrian Leuciuc

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994