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Andrea Panigada

According to our database1, Andrea Panigada authored at least 5 papers between 2006 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
An ISI Scrambling Technique for Dynamic Element Matching Current-Steering DACs.
[BibTeX]
[DOI]
Jason Remple
,
Andrea Panigada
,
Ian Galton
IEEE J. Solid State Circuits, 2022

2009
A 130 mW 100 MS/s Pipelined ADC With 69 dB SNDR Enabled by Digital Harmonic Distortion Correction.
[BibTeX]
[DOI]
Andrea Panigada
,
Ian Galton
IEEE J. Solid State Circuits, 2009

A 130mW 100MS/s pipelined ADC with 69dB SNDR enabled by digital harmonic distortion correction.
[BibTeX]
[DOI]
Andrea Panigada
,
Ian Galton
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007
A Digital Requantizer With Shaped Requantization Noise That Remains Well Behaved After Nonlinear Distortion.
[BibTeX]
[DOI]
Ashok Swaminathan
,
Andrea Panigada
,
Elias Masry
,
Ian Galton
IEEE Trans. Signal Process., 2007

2006
Digital Background Correction of Harmonic Distortion in Pipelined ADCs.
[BibTeX]
[DOI]
Andrea Panigada
,
Ian Galton
IEEE Trans. Circuits Syst. I Regul. Pap., 2006


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