Andrea Triossi

According to our database, Andrea Triossi authored at least 5 papers between 2012 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Towards Tensor Network Models for Low-Latency Jet Tagging on FPGAs.

Alberto Coppi, Ema Puljak, Lorenzo Borella, Daniel Jaschke, Enrique Rico, Maurizio Pierini, Jacopo Pazzini, Andrea Triossi, Simone Montangero

CoRR, January, 2026

2025

A Latency-Constrained, Gated Recurrent Unit (GRU) Implementation in the Versal AI Engine.

M. Sapkas, Andrea Triossi, Marco Zanetti

CoRR, November, 2025

Ultra-low latency quantum-inspired machine learning predictors implemented on FPGA.

Lorenzo Borella, Alberto Coppi, Andrea Triossi, Jacopo Pazzini, Marco Zanetti, Andrea Stanco, Marco Trenti

Mach. Learn. Sci. Technol., 2025

2012

Hardware execution of constraint handling rules.

Andrea Triossi

PhD thesis, 2012

Compiling CHR to parallel hardware.

Andrea Triossi, Salvatore Orlando, Alessandra Raffaetà, Thom W. Frühwirth

Proceedings of the Principles and Practice of Declarative Programming, 2012