Andreas Wortmann

Affiliations:
  • City University of Applied Sciences, Bremen, Germany


According to our database1, Andreas Wortmann authored at least 7 papers between 2002 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2006
Low power synthesizable register files for processor and IP cores.
Integr., 2006

2004
Register Isolation for Synthesizable Register Files.
Proceedings of the Integrated Circuit and System Design, 2004

An instruction set for the efficient implementation of the CORDIC algorithm.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

The impact of clock gating schemes on the power dissipation of synthesizable register files.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core.
Proceedings of the 2004 Design, 2004

2003
A power efficient register file architecture using master latch sharing.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Low power register file architecture for application specific DSPs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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