Andrew Chang

Affiliations:
  • Cadence Design Systems Inc., San Jose, CA, USA
  • Stanford University, CA, USA (former)
  • MIT, Cambridge, MA, USA (former)


According to our database1, Andrew Chang authored at least 11 papers between 1997 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
Explaining the gap between ASIC and custom power: a custom perspective.
Proceedings of the 42nd Design Automation Conference, 2005

2002
VLSI Design and Verification of the Imagine Processor.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

2001
Imagine: Media Processing with Streams.
IEEE Micro, 2001

2000
Processor Mechanisms for Software Shared Memory.
Proceedings of the High Performance Computing, Third International Symposium, 2000

The role of custom design in ASIC Chips.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Concurrent Event Handling through Multithreading.
IEEE Trans. Computers, 1999

1998
An Efficient, Protected Message Interface.
Computer, 1998

Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

Retrospective: the J-machine.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

The effects of explicitly parallel mechanisms on the multi-ALU processor cluster pipeline.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997
The M-machine multicomputer.
Int. J. Parallel Program., 1997


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