Anqin Xiao
Orcid: 0009-0000-5390-4335
According to our database1,
Anqin Xiao authored at least 9 papers
between 2024 and 2026.
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Bibliography
2026
A 40-nm Sub-mJ/Transfer HDC-SNN Hybrid Processor Enabling On-Chip Few-Shot Transfer Learning for IoT Applications.
IEEE Trans. Circuits Syst. Artif. Intell., June, 2026
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2026
An Always-On Event-Triggered DVS Fall Detection Processor With Precision-Adaptive Inference in 40-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026
A Self-Supervised Neuromorphic Processor Using High-Dimensional Representations for Cognitive Map Navigation.
Proceedings of the Design, Automation & Test in Europe Conference, 2026
2025
A 0.66-mm<sup>2</sup> 0.49 pJ/SOP SNN Processor With Temporal-Spatial Post-Neuron-Processing and Model-Adaptive Crossbar in 40-nm CMOS.
IEEE Trans. Biomed. Circuits Syst., December, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A 40nm 0.05-1.4uJ/inference Sample-Wise-Adaptive Spiking Neural Network Processor with Dynamic Neuron-Pruning and Unstructured-Model-Aware Architecture.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025
2024
CorTile: A Scalable Neuromorphic Processing Core for Cortical Simulation With Hybrid-Mode Router and TCAM.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024
Spiking-HDC: A Spiking Neural Network Processor with HDC Classifier Enabling Transfer Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024