Antaryami Panigrahi

According to our database, Antaryami Panigrahi authored at least 4 papers between 2016 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2021

Analysis and Modelling of pMOS based Classical Low Drop Out Regulators: A Time Domain Perspective.

Antaryami Panigrahi, Gaurav Jyoti Dutta, Swarnav Bora, Kaushik Roy Baruah, Mukul Paul

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2018

1.2 V, 12.5 MHz fourth-order low-pass filter with 83 dB stopband attenuation using low output impedance source follower in 45 nm CMOS.

Antaryami Panigrahi, Abhipsa Parhi

IET Circuits Devices Syst., 2018

2017

A 1.8 V Gain Enhanced Fully Differential Doubly-Recycled Cascode OTA with 100 dB Gain 200 MHz UGB in CMOS.

Antaryami Panigrahi, Abhipsa Parhi

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

A 0.5V Voltage-Combiner Based Pseudo Differential OTA Design in CMOS Using Weakly Inverted Transistors.

Antaryami Panigrahi, Abhipsa Parhi

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016