Anup J. Deka

According to our database, Anup J. Deka authored at least 5 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A Novel Temperature and Aging Invariant Voltage Droop Monitor Architecture with 96.94% Accuracy.

Anup J. Deka, Shobhit Tyagi, Manoja D

Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026

A Fast-Transient, Low Quiescent Controller on a 16nm Integrated Voltage Regulator.

Anup J. Deka, Biswarup Rana, Shivansh Pandey, Shobhit Tyagi

Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026

A 3nm Silicon Proven Mechanism to Eliminate Ground Bounce Impact for High-Precision Analog HVM Trim in Digital Processors.

Anup J. Deka, Balabrahmachari Matcha, Sanjay Singh, Subbu Manam

Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026

2024

A novel controlled shutdown scheme for DCDC converters enabling energy recycling.

Anup J. Deka, Shobhit Tyagi

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

A Novel Architecture with Nullified Parasitic Capacitance for Accurate FuSa Detection.

Anup J. Deka, Biswarup Rana, Shuvoshree Bhattacharya

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023